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Add parity bit update each instruction cycle
[emu8051.git]
/
src
/
cpu8051.c
diff --git
a/src/cpu8051.c
b/src/cpu8051.c
index
a44cd7f
..
55e761a
100644
(file)
--- a/
src/cpu8051.c
+++ b/
src/cpu8051.c
@@
-28,6
+28,7
@@
#include "reg8051.h"
#include "cpu8051.h"
#include "memory.h"
#include "reg8051.h"
#include "cpu8051.h"
#include "memory.h"
+#include "psw.h"
#include "disasm.h"
#include "instructions_8051.h"
#include "disasm.h"
#include "instructions_8051.h"
@@
-118,6
+119,8
@@
cpu8051_Reset(void)
memory_sfr_write8(_P1_, 0xFF);
memory_sfr_write8(_P2_, 0xFF);
memory_sfr_write8(_P3_, 0xFF);
memory_sfr_write8(_P1_, 0xFF);
memory_sfr_write8(_P2_, 0xFF);
memory_sfr_write8(_P3_, 0xFF);
+
+ /* The default value of SP (after system reset) is 07 */
memory_sfr_write8(_SP_, 0x07);
}
memory_sfr_write8(_SP_, 0x07);
}
@@
-209,12
+212,7
@@
cpu8051_ReadB(uint8_t bit_address)
static void
cpu8051_process_interrupt(int pc, int pri)
{
static void
cpu8051_process_interrupt(int pc, int pri)
{
- unsigned char SP;
-
- SP = cpu8051_ReadD(_SP_);
- cpu8051_WriteI(++SP, (cpu8051.pc & 0xFF));
- cpu8051_WriteI(++SP, (cpu8051.pc >> 8));
- cpu8051_WriteD(_SP_, SP);
+ stack_push16(pc);
cpu8051.pc = 0x0B;
cpu8051.active_priority = pri;
}
cpu8051.pc = 0x0B;
cpu8051.active_priority = pri;
}
@@
-377,6
+375,12
@@
cpu8051_Exec(void)
cpu8051.pc++;
insttiming = (*opcode_table[opcode])(); /* Function callback. */
cpu8051.pc++;
insttiming = (*opcode_table[opcode])(); /* Function callback. */
+ /*
+ * Parity bit (p): is automatically set or cleared in each machine
+ * cycle to establish even parity in the accumulator.
+ */
+ psw_compute_parity_bit();
+
for (i = 0; i < insttiming; i++) {
cpu8051_CheckInterrupts();
cpu8051_DoTimers();
for (i = 0; i < insttiming; i++) {
cpu8051_CheckInterrupts();
cpu8051_DoTimers();