* Copyright (C) 1999 Jonathan St-André
* Copyright (C) 1999 Hugo Villeneuve <hugo@hugovil.com>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ * This file is released under the GPLv2
*/
/* Define only here, for not having extern scope on local variables. */
#include <stdio.h>
#include <stdint.h>
+#include <stdbool.h>
+#include "common.h"
#include "reg8051.h"
#include "cpu8051.h"
#include "memory.h"
/* Check if the address is a breakpoint */
int
-IsBreakpoint(unsigned int address)
+breakpoint_is_defined(unsigned int address)
{
int k;
for (k = 0; k < cpu8051.bp_count; k++) {
if (cpu8051.bp[k] == address)
- return 1;
+ return true;
}
/* The address was not found in the list of breakpoints */
- return 0;
-}
-
-/* Check if the address is a stop point */
-int
-IsStoppoint(unsigned int address)
-{
- if ((options.stop_address != 0) && (options.stop_address == address))
- return 1;
- else
- return 0;
+ return false;
}
/* Show Breakpoints list */
void
-ShowBreakpoints(void)
+breakpoints_show(void)
{
int k;
- for (k = 0; k < cpu8051.bp_count; k++)
- printf("Breakpoint at address = %.4X\n", cpu8051.bp[k]);
+ if (cpu8051.bp_count) {
+ printf("Breakpoints:\n");
+ for (k = 0; k < cpu8051.bp_count; k++)
+ printf(" $%.4X\n", cpu8051.bp[k]);
+ } else {
+ printf("No breakpoints defined\n");
+ }
}
/* Set Breakpoint at address at the end of the breakpoint list */
void
-SetBreakpoint(unsigned int address)
+breakpoint_set(unsigned int address)
{
- if (IsBreakpoint(address))
- return; /* Already a breakpoint */
+ int rc;
+
+ rc = memory_check_address(PGM_MEM_ID, address, DISPLAY_ERROR_YES);
+ if (!rc)
+ return; /* Error */
- if (cpu8051.bp_count < MAXBP)
+ /* Check if breakpoint is already defined. */
+ if ((breakpoint_is_defined(address) == false) &&
+ (cpu8051.bp_count < MAXBP))
cpu8051.bp[cpu8051.bp_count++] = address;
}
/* Clear Breakpoint at Address from list */
void
-ClearBreakpoint(unsigned int address)
+breakpoint_clr(unsigned int address)
{
int k;
+ int rc;
+
+ rc = memory_check_address(PGM_MEM_ID, address, DISPLAY_ERROR_YES);
+ if (!rc)
+ return; /* Error */
+
+ /* Check if breakpoint is defined. */
+ if (breakpoint_is_defined(address) == false) {
+ log_err("No breakpoint defined at address $%X", address);
+ return;
+ }
for (k = 0; k < cpu8051.bp_count; k++) {
if (cpu8051.bp[k] == address) {
}
}
+/* Clear all breakpoints */
+void
+breakpoints_clr_all(void)
+{
+ cpu8051.bp_count = 0;
+}
+
/* Toggle the breakpoint at Address. */
void
-ToggleBreakpoint(unsigned int address)
+breakpoint_toggle(unsigned int address)
{
- if (IsBreakpoint(address))
- ClearBreakpoint(address);
+ if (breakpoint_is_defined(address))
+ breakpoint_clr(address);
else
- SetBreakpoint(address);
+ breakpoint_set(address);
+}
+
+/* Check if the address is a stop point */
+static int
+stop_point_is_defined(unsigned int address)
+{
+ if ((options.stop_address != 0) && (options.stop_address == address))
+ return true;
+ else
+ return false;
}
void
cpu8051_init(void)
{
+ int id;
+
memory_init();
+ for (id = 0; id < GP_TIMERS_COUNT; id++)
+ gp_timer_reset(id);
+
cpu8051.pc = 0;
cpu8051.clock = 0;
cpu8051.active_priority = -1;
/* Reset the registers and CPU state */
void
-cpu8051_Reset(void)
+cpu8051_reset(void)
{
cpu8051.pc = 0;
cpu8051.clock = 0;
/* Write with a direct addressing mode at Address the new Value */
void
-cpu8051_WriteD(unsigned int Address, unsigned char Value)
+cpu8051_WriteD(unsigned int address, unsigned char value)
{
- memory_write8(INT_MEM_ID, Address, Value);
+ memory_write8(INT_MEM_ID, address, value);
}
/* Write with an indirect addressing mode at Address the new Value */
void
-cpu8051_WriteI(unsigned int Address, unsigned char Value)
+cpu8051_WriteI(unsigned int address, unsigned char value)
{
- if (Address > 0x7F) {
- memory_write8(EXT_MEM_ID, Address, Value);
+ if (address > 0x7F) {
+ memory_write8(EXT_MEM_ID, address, value);
return;
}
- memory_write8(INT_MEM_ID, Address, Value);
+ memory_write8(INT_MEM_ID, address, value);
}
/* Write with a bit addressing mode at BitAddress the new Value */
{
uint8_t byte_address;
uint8_t bit_number;
- unsigned char ByteValue, ByteMask;
+ unsigned char byte_val, byte_mask;
cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
- ByteMask = ((1 << bit_number) ^ 0xFF);
- ByteValue = cpu8051_ReadD(byte_address) & ByteMask;
- ByteValue += value << bit_number;
- cpu8051_WriteD(byte_address, ByteValue);
+ byte_mask = ((1 << bit_number) ^ 0xFF);
+ byte_val = cpu8051_ReadD(byte_address) & byte_mask;
+ byte_val += value << bit_number;
+ cpu8051_WriteD(byte_address, byte_val);
}
/* Read with a direct addressing mode at Address */
unsigned char
-cpu8051_ReadD(unsigned int Address)
+cpu8051_ReadD(unsigned int address)
{
- if (Address > 0xFF)
- return memory_read8(EXT_MEM_ID, Address);
+ if (address > 0xFF)
+ return memory_read8(EXT_MEM_ID, address);
else
- return memory_read8(INT_MEM_ID, Address);
+ return memory_read8(INT_MEM_ID, address);
}
/* Read with a indirect addressing mode at Address */
unsigned char
-cpu8051_ReadI(unsigned int Address)
+cpu8051_ReadI(unsigned int address)
{
- if (Address > 0x7F)
- return memory_read8(EXT_MEM_ID, Address);
+ if (address > 0x7F)
+ return memory_read8(EXT_MEM_ID, address);
else
- return memory_read8(INT_MEM_ID, Address);
+ return memory_read8(INT_MEM_ID, address);
}
/* Read with a bit addressing mode at BitAddress */
{
uint8_t byte_address;
uint8_t bit_number;
- unsigned char BitValue;
+ unsigned char bit_value;
cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
- BitValue = (cpu8051_ReadD(byte_address) >> bit_number);
- BitValue &= 1;
- return BitValue;
+ bit_value = (cpu8051_ReadD(byte_address) >> bit_number);
+ bit_value &= 1;
+ return bit_value;
}
static int
/* Check interrupts state and process them as needed */
static void
-cpu8051_CheckInterrupts(void)
+cpu8051_check_interrupts(void)
{
int i;
/* Interrupt timer 0 */
if (cpu8051_interrupt_enabled(INTERRUPT_1) &&
cpu8051_interrupt_fire(INTERRUPT_1, i) &&
- (cpu8051_ReadD(_TCON_) & 0x20)) {
+ (cpu8051_ReadD(_TCON_) & 0x20)) {
cpu8051_WriteD(_TCON_,
cpu8051_ReadD(_TCON_) & 0xDF);
cpu8051_process_interrupt(0x0B, i);
}
/* Execute at address cpu8051.pc from PGMMem */
-void
-cpu8051_Exec(void)
+int
+cpu8051_exec(void)
{
int i;
+ int rc;
unsigned char opcode;
int insttiming;
+ /* Basic address check (may fail later if opcode has operands). */
+ rc = memory_check_address(PGM_MEM_ID, cpu8051.pc, DISPLAY_ERROR_NO);
+ if (!rc) {
+ log_err("Trying to run past program memory limit");
+ return false; /* Error */
+ }
+
opcode = memory_read8(PGM_MEM_ID, cpu8051.pc);
cpu8051.pc++;
insttiming = (*opcode_table[opcode])(); /* Function callback. */
*/
psw_compute_parity_bit();
+ gp_timers_increment(insttiming);
+
for (i = 0; i < insttiming; i++) {
- cpu8051_CheckInterrupts();
+ cpu8051_check_interrupts();
timers_check();
cpu8051.clock++;
}
+
+ return true;
+}
+
+/*
+ * Run specified number of instructions, or when encountering a
+ * breakpoint or a stop point.
+ * Set instr_count to -1 to disable running for a specific number
+ * of instructions.
+ *
+ * Returns TRUE when a breakpoint is encountered.
+ */
+int
+cpu8051_run(int instr_count, int (*interface_stop)(void))
+{
+ int rc;
+ int run = true;
+ int breakpoint_hit = false;
+
+ while (run) {
+ rc = cpu8051_exec();
+ if (!rc) {
+ run = false;
+ } else {
+ if (instr_count > 0)
+ instr_count--;
+
+ if (instr_count == 0) {
+ run = false;
+ log_info("Number of instructions reached");
+ }
+
+ if (breakpoint_is_defined(cpu8051.pc)) {
+ run = false;
+ breakpoint_hit = true;
+ log_info("Breakpoint hit at %.4X", cpu8051.pc);
+ }
+
+ if (stop_point_is_defined(cpu8051.pc)) {
+ run = false;
+ log_info("Stoppoint hit at %.4X", cpu8051.pc);
+ }
+
+ if (interface_stop != NULL) {
+ if (interface_stop()) {
+ run = false;
+ log_info("Caught break signal");
+ }
+ }
+ }
+ }
+
+ return breakpoint_hit;
}
/*
/* Return as Text the name of the SFR register at Address if any */
static int
-cpu8051_SFRMemInfo(unsigned int Address, char *Text)
+cpu8051_sfr_mem_info(unsigned int address, char *text)
{
- switch (Address) {
- case 0x80: return sprintf(Text, "P0");
- case 0x81: return sprintf(Text, "SP");
- case 0x82: return sprintf(Text, "DPL");
- case 0x83: return sprintf(Text, "DPH");
- case 0x87: return sprintf(Text, "PCON");
- case 0x88: return sprintf(Text, "TCON");
- case 0x89: return sprintf(Text, "TMOD");
- case 0x8A: return sprintf(Text, "TL0");
- case 0x8B: return sprintf(Text, "TL1");
- case 0x8C: return sprintf(Text, "TH0");
- case 0x8D: return sprintf(Text, "TH1");
- case 0x90: return sprintf(Text, "P1");
- case 0x98: return sprintf(Text, "SCON");
- case 0x99: return sprintf(Text, "SBUF");
- case 0xA0: return sprintf(Text, "P2");
- case 0xA8: return sprintf(Text, "IE");
- case 0xB0: return sprintf(Text, "P3");
- case 0xB8: return sprintf(Text, "IP");
- case 0xC8: return sprintf(Text, "T2CON");
- case 0xCA: return sprintf(Text, "RCAP2L");
- case 0xCB: return sprintf(Text, "RCAP2H");
- case 0xCC: return sprintf(Text, "TL2");
- case 0xCD: return sprintf(Text, "TH2");
- case 0xD0: return sprintf(Text, "PSW");
- case 0xE0: return sprintf(Text, "ACC");
- case 0xF0: return sprintf(Text, "B");
- default: return sprintf(Text, "%.2XH", Address);
+ switch (address) {
+ case 0x80: return sprintf(text, "P0");
+ case 0x81: return sprintf(text, "SP");
+ case 0x82: return sprintf(text, "DPL");
+ case 0x83: return sprintf(text, "DPH");
+ case 0x87: return sprintf(text, "PCON");
+ case 0x88: return sprintf(text, "TCON");
+ case 0x89: return sprintf(text, "TMOD");
+ case 0x8A: return sprintf(text, "TL0");
+ case 0x8B: return sprintf(text, "TL1");
+ case 0x8C: return sprintf(text, "TH0");
+ case 0x8D: return sprintf(text, "TH1");
+ case 0x90: return sprintf(text, "P1");
+ case 0x98: return sprintf(text, "SCON");
+ case 0x99: return sprintf(text, "SBUF");
+ case 0xA0: return sprintf(text, "P2");
+ case 0xA8: return sprintf(text, "IE");
+ case 0xB0: return sprintf(text, "P3");
+ case 0xB8: return sprintf(text, "IP");
+ case 0xC8: return sprintf(text, "T2CON");
+ case 0xCA: return sprintf(text, "RCAP2L");
+ case 0xCB: return sprintf(text, "RCAP2H");
+ case 0xCC: return sprintf(text, "TL2");
+ case 0xCD: return sprintf(text, "TH2");
+ case 0xD0: return sprintf(text, "PSW");
+ case 0xE0: return sprintf(text, "ACC");
+ case 0xF0: return sprintf(text, "B");
+ default: return sprintf(text, "%.2XH", address);
}
}
-/* Return as Text the decoded BitAddress */
+/* Return as text the decoded bit address */
static void
-cpu8051_IntMemBitInfo(uint8_t bit_address, char *text)
+cpu8051_int_mem_bit_info(uint8_t bit_address, char *text)
{
uint8_t byte_address;
uint8_t bit_number;
cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
- len = cpu8051_SFRMemInfo(byte_address, text);
+ len = cpu8051_sfr_mem_info(byte_address, text);
sprintf(&text[len], ".%X", bit_address);
}
}
/* Display instruction mnemonic. */
-void
-cpu8051_disasm_mnemonic(unsigned char OpCode, char *buf)
+int
+cpu8051_disasm_mnemonic(unsigned char opcode, char *buf)
{
- sprintf(buf, "%s", InstTextTbl[InstTypesTbl[OpCode]]);
+ return sprintf(buf, "%s", InstTextTbl[InstTypesTbl[opcode]]);
}
/* Disasm instruction arguments starting at address into a text string */
cpu8051_disasm_args(unsigned int address, char *buf)
{
int len = 0;
- char TextTmp[20];
- unsigned char OpCode;
- int ArgTblOfs;
+ char str[20];
+ unsigned char opcode;
+ int args_table_offset;
int i;
- OpCode = memory_read8(PGM_MEM_ID, address);
- ArgTblOfs = OpCode << 2;
+ buf[0] = '\0';
+
+ opcode = memory_read8(PGM_MEM_ID, address);
+ args_table_offset = opcode << 2;
address++;
/*
- * MOV direct, direct (OpCode 85h) is peculiar, the operands
+ * MOV direct, direct (opcode 85h) is peculiar, the operands
* are inverted
*/
- if (OpCode == 0x85) {
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address + 1),
- TextTmp);
- len += sprintf(&buf[len], "%s,", TextTmp);
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address),
- TextTmp);
- len += sprintf(&buf[len], "%s", TextTmp);
+ if (opcode == 0x85) {
+ cpu8051_sfr_mem_info(memory_read8(PGM_MEM_ID, address + 1),
+ str);
+ len += sprintf(&buf[len], "%s,", str);
+ cpu8051_sfr_mem_info(memory_read8(PGM_MEM_ID, address),
+ str);
+ len += sprintf(&buf[len], "%s", str);
address += 2;
return;
}
- for (i = 1; i <= InstArgTbl[ArgTblOfs]; i++) {
- switch (InstArgTbl[ArgTblOfs + i]) {
+ for (i = 1; i <= InstArgTbl[args_table_offset]; i++) {
+ switch (InstArgTbl[args_table_offset + i]) {
case ADDR11: {
len += sprintf(&buf[len],
- "%.4XH", ((OpCode << 3) & 0xF00) +
+ "%.4XH", ((opcode << 3) & 0xF00) +
(memory_read8(PGM_MEM_ID, address)));
address++;
break;
break;
}
case DIRECT: {
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address),
- TextTmp);
- len += sprintf(&buf[len], "%s", TextTmp);
+ cpu8051_sfr_mem_info(memory_read8(PGM_MEM_ID, address),
+ str);
+ len += sprintf(&buf[len], "%s", str);
address++;
break;
}
case BITADDR: {
- cpu8051_IntMemBitInfo(
+ cpu8051_int_mem_bit_info(
(memory_read8(PGM_MEM_ID, address) & 0xF8),
- TextTmp);
- len += sprintf(&buf[len], "%s.%X" , TextTmp,
+ str);
+ len += sprintf(&buf[len], "%s.%X" , str,
(memory_read8(PGM_MEM_ID, address) & 7));
address++;
break;
break;
}
case CBITADDR: {
- cpu8051_IntMemBitInfo((memory_read8(PGM_MEM_ID,
- address) & 0xF8),
- TextTmp);
- len += sprintf(&buf[len], "/%s.%X", TextTmp,
+ cpu8051_int_mem_bit_info((memory_read8(PGM_MEM_ID,
+ address) & 0xF8),
+ str);
+ len += sprintf(&buf[len], "/%s.%X", str,
(memory_read8(PGM_MEM_ID, address) & 7));
address++;
break;
}
default: {
- len += sprintf(&buf[len], "%s",
- ArgsTextTbl[InstArgTbl[ArgTblOfs + i]]);
+ len += sprintf(
+ &buf[len], "%s",
+ ArgsTextTbl[InstArgTbl[args_table_offset + i]]);
}
}
- if (i < InstArgTbl[ArgTblOfs])
+ if (i < InstArgTbl[args_table_offset])
len += sprintf(&buf[len], ",");
}
}
-/* Disasm one instruction at Address into a Text string */
+/* Disasm one instruction at address into a Text string */
int
-cpu8051_Disasm(unsigned int Address, char *Text)
+cpu8051_disasm(unsigned int address, char *text)
{
int len = 0;
- char TextTmp[20];
- unsigned char OpCode;
- int ArgTblOfs;
- int InstSize;
+ unsigned char opcode;
+ int inst_size;
int i;
/* Display address. */
- len += sprintf(Text, " %.4X ", Address);
+ len += sprintf(text, " %.4X ", address);
- OpCode = memory_read8(PGM_MEM_ID, Address);
- InstSize = InstSizesTbl[OpCode];
+ opcode = memory_read8(PGM_MEM_ID, address);
+ inst_size = InstSizesTbl[opcode];
/* Display hex bytes. */
- for (i = 0; i < InstSize; i++)
- len += sprintf(&Text[len], " %.2X",
- memory_read8(PGM_MEM_ID, Address + i));
-
- Address++;
+ for (i = 0; i < inst_size; i++)
+ len += sprintf(&text[len], " %.2X",
+ memory_read8(PGM_MEM_ID, address + i));
/* Padd remaining area with spaces. */
for (; len < 17;)
- len += sprintf(&Text[len], " ");
+ len += sprintf(&text[len], " ");
/* Display instruction mnemonic. */
- len += sprintf(&Text[len], "%s ",
- InstTextTbl[InstTypesTbl[OpCode]]);
- ArgTblOfs = OpCode << 2;
+ len += cpu8051_disasm_mnemonic(opcode, &text[len]);
/* Padd remaining area with spaces. */
for (; len < 25;)
- len += sprintf(&Text[len], " ");
+ len += sprintf(&text[len], " ");
/* Display instruction arguments. */
+ cpu8051_disasm_args(address, &text[len]);
- /*
- * MOV direct, direct (OpCode 85h) is peculiar, the operands
- * are inverted
- */
- if (OpCode == 0x85) {
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address + 1),
- TextTmp);
- len += sprintf(&Text[len], "%s,", TextTmp);
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address),
- TextTmp);
- len += sprintf(&Text[len], "%s", TextTmp);
- Address += 2;
- return InstSize;
- }
-
- for (i = 1; i <= InstArgTbl[ArgTblOfs]; i++) {
- switch (InstArgTbl[ArgTblOfs + i]) {
- case ADDR11: {
- len += sprintf(&Text[len],
- "%.4XH", ((OpCode << 3) & 0xF00) +
- (memory_read8(PGM_MEM_ID, Address)));
- Address++;
- break;
- }
- case ADDR16: {
- len += sprintf(
- &Text[len], "%.4XH",
- ((memory_read8(PGM_MEM_ID, Address) << 8) +
- memory_read8(PGM_MEM_ID, Address + 1)));
- Address += 2;
- break;
- }
- case DIRECT: {
- cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address),
- TextTmp);
- len += sprintf(&Text[len], "%s", TextTmp);
- Address++;
- break;
- }
- case BITADDR: {
- cpu8051_IntMemBitInfo(
- (memory_read8(PGM_MEM_ID, Address) & 0xF8),
- TextTmp);
- len += sprintf(&Text[len], "%s.%X" , TextTmp,
- (memory_read8(PGM_MEM_ID, Address) & 7));
- Address++;
- break;
- }
- case RELADDR: {
- Address++;
- len += sprintf(&Text[len], "%.4XH", (Address & 0xFF00) +
- (((Address & 0xFF) +
- memory_read8(PGM_MEM_ID,
- Address - 1)) & 0xFF));
- break;
- }
- case DATAIMM: {
- len += sprintf(&Text[len], "#%.2XH",
- memory_read8(PGM_MEM_ID, Address));
- Address++;
- break;
- }
- case DATA16: {
- len += sprintf(&Text[len], "#%.4XH",
- ((memory_read8(PGM_MEM_ID,
- Address) << 8) +
- memory_read8(PGM_MEM_ID, Address+1)));
- Address += 2;
- break;
- }
- case CBITADDR: {
- cpu8051_IntMemBitInfo((memory_read8(PGM_MEM_ID,
- Address) & 0xF8),
- TextTmp);
- len += sprintf(&Text[len], "/%s.%X", TextTmp,
- (memory_read8(PGM_MEM_ID, Address) & 7));
- Address++;
- break;
- }
- default: {
- len += sprintf(&Text[len], "%s",
- ArgsTextTbl[InstArgTbl[ArgTblOfs + i]]);
- }
- }
- if (i < InstArgTbl[ArgTblOfs])
- len += sprintf(&Text[len], ",");
- }
-
- return InstSize;
+ return inst_size;
}
projects / emu8051.git / blobdiff