#include "common.h"
#include "reg8051.h"
#include "cpu8051.h"
+#include "memory.h"
#include "regwin.h"
#include "memwin.h"
#include "pgmwin.h"
#include "instructions_8051.h"
#include "hexfile.h"
+#include "emugtk.h"
static GtkWidget *reglist;
-#define DATA_ROWS 24
+#define DATA_ROWS 26
enum
{
regwin_read(int addr, int width)
{
if (width == 2)
- return cpu8051_ReadD(addr);
+ return memory_sfr_read8(addr);
else if (width == 4) {
/* Address is low address. */
- return (cpu8051_ReadD(addr + 1) << 8) +
- cpu8051_ReadD(addr);
+ return (memory_sfr_read8(addr + 1) << 8) |
+ memory_sfr_read8(addr);
} else
return 0xFFFFFFFF;
}
regwin_write(int addr, int val, int width)
{
if (width == 2)
- cpu8051_WriteD(addr, (u_int8_t) val);
+ memory_sfr_write8(addr, (u_int8_t) val);
else if (width == 4) {
/* Address is low address. */
- cpu8051_WriteD(addr + 1, (u_int8_t) ((val & 0x0000FFFF) >> 8));
- cpu8051_WriteD(addr, (u_int8_t) val);
+ memory_sfr_write8(addr + 1, (u_int8_t) ((val & 0x0000FFFF) >> 8));
+ memory_sfr_write8(addr, (u_int8_t) val);
}
};
cpu8051.pc = (u_int16_t) val;
}
+static unsigned int
+regwin_read_timer(int timer_low_addr)
+{
+ return (memory_sfr_read8(timer_low_addr + 2) << 8) |
+ memory_sfr_read8(timer_low_addr);
+}
+
+static void
+regwin_write_timer(int timer_low_addr, int val)
+{
+ memory_sfr_write8(timer_low_addr + 2, (u_int8_t) ((val & 0x0000FFFF) >> 8));
+ memory_sfr_write8(timer_low_addr, (u_int8_t) val);
+}
+
+static u_int8_t
+regwin_read_bank_offset(void)
+{
+ return memory_sfr_read8(_PSW_) & 0x18;
+}
+
static unsigned int
regwin_read_bank(int dummy)
{
- return BANKPSW >> 3;
+ return regwin_read_bank_offset() >> 3;
}
static void
regwin_write_bank(int param, int bank_number)
{
- u_int8_t psw = cpu8051_ReadD(_PSW_);
+ u_int8_t psw = memory_sfr_read8(_PSW_);
if ((bank_number < 0) || (bank_number > 3)) {
log_info("Error: invalid bank number: %d", bank_number);
bank_number = 0;
}
- cpu8051_WriteD(_PSW_, (psw & ~0x18) | (bank_number << 3));
+ memory_sfr_write8(_PSW_, (psw & ~0x18) | (bank_number << 3));
}
-/* Read R0 - R7 in current bank. */
+/* Indirect read of R0 - R7 in current bank from internal memory. */
static unsigned int
regwin_read_rx(int offset)
{
- return cpu8051_ReadD(BANKPSW + offset);
+ return memory_read8(INT_MEM_ID, regwin_read_bank_offset() + offset);
}
+/* Indirect write to R0 - R7 in current bank to internal memory. */
static void
regwin_write_rx(int offset, int val)
{
- cpu8051_WriteD(BANKPSW + offset, (u_int8_t) val);
+ memory_write8(INT_MEM_ID, regwin_read_bank_offset() + offset, (u_int8_t) val);
}
/* This array defines how to read value for each register. */
NULL, NULL,
_TMOD_,
},
+ {
+ "TIMER0",
+ HEX_DIGITS_4,
+ regwin_read_timer, regwin_write_timer,
+ _TL0_,
+ },
+ {
+ "TIMER1",
+ HEX_DIGITS_4,
+ regwin_read_timer, regwin_write_timer,
+ _TL1_,
+ },
{
"SCON",
HEX_DIGITS_2,
regwin_init_store(void)
{
GtkTreeIter iter;
- int rows;
+ int row;
int col;
GtkListStore *store;
GType col_types[N_COLUMNS];
- for (col = 0; col < N_COLUMNS; col++) {
+ /* No need for static array, all our columns are of the same type. */
+ for (col = 0; col < N_COLUMNS; col++)
col_types[col] = G_TYPE_STRING;
- }
store = gtk_list_store_newv(N_COLUMNS, col_types);
- /* Initialize with rows of dummy data... */
- for (rows = 0; rows < DATA_ROWS; rows++) {
- /* Add new row. */
+ /* Add rows. */
+ for (row = 0; row < DATA_ROWS; row++)
gtk_list_store_append(store, &iter);
- }
return store;
}
* Make sure to update all windows.
* For example, R0-R7 values depends on internal memory values.
*/
- regwin_Show();
- memwin_DumpD();
- pgmwin_Disasm();
+ emugtk_UpdateDisplay();
};
static void
/* Show registers. */
void
-regwin_Show(void)
+regwin_refresh(void)
{
int row;
GtkListStore *store;