X-Git-Url: http://gitweb.hugovil.com/?a=blobdiff_plain;f=src%2Fcommon%2Fcpu8051.c;h=288c11ee2d1a90383cf959a9b681c51dd38e19ec;hb=9cd867c94aabb48f44658a7a4d6832115c876b74;hp=107f2efcd190d441b88e29da3aa339e5bd9d8164;hpb=a6ccc722bd181ba4a762a29a7c95742ae5e5ccfb;p=emu8051.git

diff --git a/src/common/cpu8051.c b/src/common/cpu8051.c
index 107f2ef..288c11e 100644
--- a/src/common/cpu8051.c
+++ b/src/common/cpu8051.c
@@ -4,19 +4,7 @@
  * Copyright (C) 1999 Jonathan St-André
  * Copyright (C) 1999 Hugo Villeneuve <hugo@hugovil.com>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ * This file is released under the GPLv2
  */
 
 /* Define only here, for not having extern scope on local variables. */
@@ -32,7 +20,7 @@
 #include "memory.h"
 #include "psw.h"
 #include "timers.h"
-#include "disasm.h"
+#include "opcodes.h"
 #include "options.h"
 #include "instructions_8051.h"
 
@@ -40,55 +28,66 @@ extern struct options_t options;
 
 /* Check if the address is a breakpoint */
 int
-IsBreakpoint(unsigned int address)
+breakpoint_is_defined(unsigned int address)
 {
 	int k;
 
 	for (k = 0; k < cpu8051.bp_count; k++) {
 		if (cpu8051.bp[k] == address)
-			return 1;
+			return true;
 	}
 
 	/* The address was not found in the list of breakpoints */
-	return 0;
-}
-
-/* Check if the address is a stop point */
-int
-IsStoppoint(unsigned int address)
-{
-	if ((options.stop_address != 0) && (options.stop_address == address))
-		return 1;
-	else
-		return 0;
+	return false;
 }
 
 /* Show Breakpoints list */
 void
-ShowBreakpoints(void)
+breakpoints_show(void)
 {
 	int k;
 
-	for (k = 0; k < cpu8051.bp_count; k++)
-		printf("Breakpoint at address = %.4X\n", cpu8051.bp[k]);
+	if (cpu8051.bp_count) {
+		printf("Breakpoints:\n");
+		for (k = 0; k < cpu8051.bp_count; k++)
+			printf("  $%.4X\n", cpu8051.bp[k]);
+	} else {
+		printf("No breakpoints defined\n");
+	}
 }
 
 /* Set Breakpoint at address at the end of the breakpoint list */
 void
-SetBreakpoint(unsigned int address)
+breakpoint_set(unsigned int address)
 {
-	if (IsBreakpoint(address))
-		return; /* Already a breakpoint */
+	int rc;
+
+	rc = mem_check_address(PGM_MEM_ID, address, DISPLAY_ERROR_YES);
+	if (!rc)
+		return; /* Error */
 
-	if (cpu8051.bp_count < MAXBP)
+	/* Check if breakpoint is already defined. */
+	if ((breakpoint_is_defined(address) == false) &&
+	    (cpu8051.bp_count < MAXBP))
 		cpu8051.bp[cpu8051.bp_count++] = address;
 }
 
 /* Clear Breakpoint at Address from list */
 void
-ClearBreakpoint(unsigned int address)
+breakpoint_clr(unsigned int address)
 {
 	int k;
+	int rc;
+
+	rc = mem_check_address(PGM_MEM_ID, address, DISPLAY_ERROR_YES);
+	if (!rc)
+		return; /* Error */
+
+	/* Check if breakpoint is defined. */
+	if (breakpoint_is_defined(address) == false) {
+		log_err("No breakpoint defined at address $%X", address);
+		return;
+	}
 
 	for (k = 0; k < cpu8051.bp_count; k++) {
 		if (cpu8051.bp[k] == address) {
@@ -99,22 +98,42 @@ ClearBreakpoint(unsigned int address)
 	}
 }
 
+/* Clear all breakpoints */
+void
+breakpoints_clr_all(void)
+{
+	cpu8051.bp_count = 0;
+}
+
 /* Toggle the breakpoint at Address. */
 void
-ToggleBreakpoint(unsigned int address)
+breakpoint_toggle(unsigned int address)
+{
+	if (breakpoint_is_defined(address))
+		breakpoint_clr(address);
+	else
+		breakpoint_set(address);
+}
+
+/* Check if the address is a stop point */
+static int
+stop_point_is_defined(unsigned int address)
 {
-	if (IsBreakpoint(address))
-		ClearBreakpoint(address);
+	if ((options.stop_address != 0) && (options.stop_address == address))
+		return true;
 	else
-		SetBreakpoint(address);
+		return false;
 }
 
 void
 cpu8051_init(void)
 {
-	memory_init();
+	int id;
 
-	gp_timer_reset();
+	mem_init();
+
+	for (id = 0; id < GP_TIMERS_COUNT; id++)
+		gp_timer_reset(id);
 
 	cpu8051.pc = 0;
 	cpu8051.clock = 0;
@@ -124,113 +143,28 @@ cpu8051_init(void)
 
 /* Reset the registers and CPU state */
 void
-cpu8051_Reset(void)
+cpu8051_reset(void)
 {
 	cpu8051.pc = 0;
 	cpu8051.clock = 0;
 	cpu8051.active_priority = -1;
 
 	/* Clear IRAM and SFR. */
-	memory_clear(INT_MEM_ID);
+	mem_clear(INT_MEM_ID);
 
-	memory_sfr_write8(_P0_, 0xFF);
-	memory_sfr_write8(_P1_, 0xFF);
-	memory_sfr_write8(_P2_, 0xFF);
-	memory_sfr_write8(_P3_, 0xFF);
+	mem_sfr_write8(_P0_, 0xFF);
+	mem_sfr_write8(_P1_, 0xFF);
+	mem_sfr_write8(_P2_, 0xFF);
+	mem_sfr_write8(_P3_, 0xFF);
 
 	/* The default value of SP (after system reset) is 07 */
-	memory_sfr_write8(_SP_, 0x07);
-}
-
-static void
-cpu8051_convert_bit_address(uint8_t bit_address, uint8_t *byte_address,
-			    uint8_t *bit_number)
-{
-	if (bit_address > 0x7F) {
-		/* SFR 80-FF */
-		*byte_address = bit_address & 0xF8;
-		*bit_number = bit_address & 0x07;
-	} else {
-		/* 20-2F */
-		*byte_address = (bit_address >> 3) + 0x20;
-		*bit_number = bit_address & 0x07;
-	}
-}
-
-/* Write with a direct addressing mode at Address the new Value */
-void
-cpu8051_WriteD(unsigned int Address, unsigned char Value)
-{
-	memory_write8(INT_MEM_ID, Address, Value);
-}
-
-/* Write with an indirect addressing mode at Address the new Value */
-void
-cpu8051_WriteI(unsigned int Address, unsigned char Value)
-{
-	if (Address > 0x7F) {
-		memory_write8(EXT_MEM_ID, Address, Value);
-		return;
-	}
-
-	memory_write8(INT_MEM_ID, Address, Value);
-}
-
-/* Write with a bit addressing mode at BitAddress the new Value */
-void
-cpu8051_WriteB(uint8_t bit_address, uint8_t value)
-{
-	uint8_t byte_address;
-	uint8_t bit_number;
-	unsigned char ByteValue, ByteMask;
-
-	cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
-
-	ByteMask = ((1 << bit_number) ^ 0xFF);
-	ByteValue = cpu8051_ReadD(byte_address) & ByteMask;
-	ByteValue += value << bit_number;
-	cpu8051_WriteD(byte_address, ByteValue);
-}
-
-/* Read with a direct addressing mode at Address */
-unsigned char
-cpu8051_ReadD(unsigned int Address)
-{
-	if (Address > 0xFF)
-		return memory_read8(EXT_MEM_ID, Address);
-	else
-		return memory_read8(INT_MEM_ID, Address);
-}
-
-/* Read with a indirect addressing mode at Address */
-unsigned char
-cpu8051_ReadI(unsigned int Address)
-{
-	if (Address > 0x7F)
-		return memory_read8(EXT_MEM_ID, Address);
-	else
-		return memory_read8(INT_MEM_ID, Address);
-}
-
-/* Read with a bit addressing mode at BitAddress */
-unsigned char
-cpu8051_ReadB(uint8_t bit_address)
-{
-	uint8_t byte_address;
-	uint8_t bit_number;
-	unsigned char BitValue;
-
-	cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
-
-	BitValue = (cpu8051_ReadD(byte_address) >> bit_number);
-	BitValue &= 1;
-	return BitValue;
+	mem_sfr_write8(_SP_, 0x07);
 }
 
 static int
 cpu8051_interrupt_fire(int interrupt_no, int priority)
 {
-	if (cpu8051_ReadD(_IP_) & INTERRUPT_MASK(interrupt_no))
+	if (mem_read_direct(_IP_) & INTERRUPT_MASK(interrupt_no))
 		return priority;
 	else
 		return !priority;
@@ -239,7 +173,8 @@ cpu8051_interrupt_fire(int interrupt_no, int priority)
 static int
 cpu8051_interrupt_enabled(int interrupt_no)
 {
-	return (cpu8051_ReadD(_IE_) & INTERRUPT_MASK(interrupt_no)) ? 1 : 0;
+	return (mem_read_direct(_IE_) & INTERRUPT_MASK(interrupt_no)) ?
+		1 : 0;
 }
 
 static void
@@ -253,11 +188,11 @@ cpu8051_process_interrupt(int pc, int pri)
 
 /* Check interrupts state and process them as needed */
 static void
-cpu8051_CheckInterrupts(void)
+cpu8051_check_interrupts(void)
 {
 	int i;
 
-	if ((cpu8051_ReadD(_IE_) & 0x80) == 0)
+	if ((mem_read_direct(_IE_) & 0x80) == 0)
 		return;
 
 	for (i = INTERRUPT_PRIORITY_HIGH; i >= INTERRUPT_PRIORITY_LOW; i--) {
@@ -265,32 +200,34 @@ cpu8051_CheckInterrupts(void)
 			/* Interrupt timer 0 */
 			if (cpu8051_interrupt_enabled(INTERRUPT_1) &&
 			    cpu8051_interrupt_fire(INTERRUPT_1, i) &&
-			     (cpu8051_ReadD(_TCON_) & 0x20)) {
-				cpu8051_WriteD(_TCON_,
-					       cpu8051_ReadD(_TCON_) & 0xDF);
+			    (mem_read_direct(_TCON_) & 0x20)) {
+				mem_write_direct(
+					_TCON_,
+					mem_read_direct(_TCON_) & 0xDF);
 				cpu8051_process_interrupt(0x0B, i);
 				return;
 			}
 			/* Interrupt timer 1 */
 			if (cpu8051_interrupt_enabled(INTERRUPT_3) &&
 			    cpu8051_interrupt_fire(INTERRUPT_3, i) &&
-			    (cpu8051_ReadD(_TCON_) & 0x80)) {
-				cpu8051_WriteD(_TCON_,
-					       cpu8051_ReadD(_TCON_) & 0x7F);
+			    (mem_read_direct(_TCON_) & 0x80)) {
+				mem_write_direct(
+					_TCON_,
+					mem_read_direct(_TCON_) & 0x7F);
 				cpu8051_process_interrupt(0x1B, i);
 				return;
 			}
 			/* Serial Interrupts */
 			if (cpu8051_interrupt_enabled(INTERRUPT_4) &&
 			    cpu8051_interrupt_fire(INTERRUPT_4, i) &&
-			    (cpu8051_ReadD(_SCON_) & 0x03)) {
+			    (mem_read_direct(_SCON_) & 0x03)) {
 				cpu8051_process_interrupt(0x23, i);
 				return;
 			}
 			/* Interrupt timer 2 */
 			if (cpu8051_interrupt_enabled(INTERRUPT_5) &&
 			    cpu8051_interrupt_fire(INTERRUPT_5, i) &&
-			    (cpu8051_ReadD(_T2CON_) & 0x80)) {
+			    (mem_read_direct(_T2CON_) & 0x80)) {
 				cpu8051_process_interrupt(0x2B, i);
 				return;
 			}
@@ -299,14 +236,22 @@ cpu8051_CheckInterrupts(void)
 }
 
 /* Execute at address cpu8051.pc from PGMMem */
-void
-cpu8051_Exec(void)
+int
+cpu8051_exec(void)
 {
 	int i;
+	int rc;
 	unsigned char opcode;
 	int insttiming;
 
-	opcode = memory_read8(PGM_MEM_ID, cpu8051.pc);
+	/* Basic address check (may fail later if opcode has operands). */
+	rc = mem_check_address(PGM_MEM_ID, cpu8051.pc, DISPLAY_ERROR_NO);
+	if (!rc) {
+		log_err("Trying to run past program memory limit");
+		return false; /* Error */
+	}
+
+	opcode = mem_read8(PGM_MEM_ID, cpu8051.pc);
 	cpu8051.pc++;
 	insttiming = (*opcode_table[opcode])(); /* Function callback. */
 
@@ -316,13 +261,15 @@ cpu8051_Exec(void)
 	 */
 	psw_compute_parity_bit();
 
-	gp_timer_increment(insttiming);
+	gp_timers_increment(insttiming);
 
 	for (i = 0; i < insttiming; i++) {
-		cpu8051_CheckInterrupts();
+		cpu8051_check_interrupts();
 		timers_check();
 		cpu8051.clock++;
 	}
+
+	return true;
 }
 
 /*
@@ -336,35 +283,39 @@ cpu8051_Exec(void)
 int
 cpu8051_run(int instr_count, int (*interface_stop)(void))
 {
-	int stop = false;
+	int rc;
+	int run = true;
 	int breakpoint_hit = false;
 
-	while (stop == false) {
-		cpu8051_Exec();
-
-		if (instr_count > 0)
-			instr_count--;
-
-		if (instr_count == 0) {
-			stop = true;
-			log_info("Number of instructions reached! Stopping!");
-		}
+	while (run) {
+		rc = cpu8051_exec();
+		if (!rc) {
+			run = false;
+		} else {
+			if (instr_count > 0)
+				instr_count--;
+
+			if (instr_count == 0) {
+				run = false;
+				log_info("Number of instructions reached");
+			}
 
-		if (IsBreakpoint(cpu8051.pc)) {
-			stop = true;
-			breakpoint_hit = true;
-			log_info("Breakpoint hit at %.4X! Stopping!", cpu8051.pc);
-		}
+			if (breakpoint_is_defined(cpu8051.pc)) {
+				run = false;
+				breakpoint_hit = true;
+				log_info("Breakpoint hit at %.4X", cpu8051.pc);
+			}
 
-		if (IsStoppoint(cpu8051.pc)) {
-			stop = true;
-			log_info("Stoppoint hit at %.4X! Stopping!", cpu8051.pc);
-		}
+			if (stop_point_is_defined(cpu8051.pc)) {
+				run = false;
+				log_info("Stoppoint hit at %.4X", cpu8051.pc);
+			}
 
-		if (interface_stop != NULL) {
-			if (interface_stop()) {
-				stop = true;
-				log_info("Caught break signal!");
+			if (interface_stop != NULL) {
+				if (interface_stop()) {
+					run = false;
+					log_info("Caught break signal");
+				}
 			}
 		}
 	}
@@ -409,65 +360,58 @@ cpu8051_run(int instr_count, int (*interface_stop)(void))
 
 /* Return as Text the name of the SFR register at Address if any */
 static int
-cpu8051_SFRMemInfo(unsigned int Address, char *Text)
+cpu8051_sfr_mem_info(unsigned int address, char *text)
 {
-	switch (Address) {
-	case 0x80: return sprintf(Text, "P0");
-	case 0x81: return sprintf(Text, "SP");
-	case 0x82: return sprintf(Text, "DPL");
-	case 0x83: return sprintf(Text, "DPH");
-	case 0x87: return sprintf(Text, "PCON");
-	case 0x88: return sprintf(Text, "TCON");
-	case 0x89: return sprintf(Text, "TMOD");
-	case 0x8A: return sprintf(Text, "TL0");
-	case 0x8B: return sprintf(Text, "TL1");
-	case 0x8C: return sprintf(Text, "TH0");
-	case 0x8D: return sprintf(Text, "TH1");
-	case 0x90: return sprintf(Text, "P1");
-	case 0x98: return sprintf(Text, "SCON");
-	case 0x99: return sprintf(Text, "SBUF");
-	case 0xA0: return sprintf(Text, "P2");
-	case 0xA8: return sprintf(Text, "IE");
-	case 0xB0: return sprintf(Text, "P3");
-	case 0xB8: return sprintf(Text, "IP");
-	case 0xC8: return sprintf(Text, "T2CON");
-	case 0xCA: return sprintf(Text, "RCAP2L");
-	case 0xCB: return sprintf(Text, "RCAP2H");
-	case 0xCC: return sprintf(Text, "TL2");
-	case 0xCD: return sprintf(Text, "TH2");
-	case 0xD0: return sprintf(Text, "PSW");
-	case 0xE0: return sprintf(Text, "ACC");
-	case 0xF0: return sprintf(Text, "B");
-	default: return sprintf(Text, "%.2XH", Address);
+	switch (address) {
+	case 0x80: return sprintf(text, "P0");
+	case 0x81: return sprintf(text, "SP");
+	case 0x82: return sprintf(text, "DPL");
+	case 0x83: return sprintf(text, "DPH");
+	case 0x87: return sprintf(text, "PCON");
+	case 0x88: return sprintf(text, "TCON");
+	case 0x89: return sprintf(text, "TMOD");
+	case 0x8A: return sprintf(text, "TL0");
+	case 0x8B: return sprintf(text, "TL1");
+	case 0x8C: return sprintf(text, "TH0");
+	case 0x8D: return sprintf(text, "TH1");
+	case 0x90: return sprintf(text, "P1");
+	case 0x98: return sprintf(text, "SCON");
+	case 0x99: return sprintf(text, "SBUF");
+	case 0xA0: return sprintf(text, "P2");
+	case 0xA8: return sprintf(text, "IE");
+	case 0xB0: return sprintf(text, "P3");
+	case 0xB8: return sprintf(text, "IP");
+	case 0xC8: return sprintf(text, "T2CON");
+	case 0xCA: return sprintf(text, "RCAP2L");
+	case 0xCB: return sprintf(text, "RCAP2H");
+	case 0xCC: return sprintf(text, "TL2");
+	case 0xCD: return sprintf(text, "TH2");
+	case 0xD0: return sprintf(text, "PSW");
+	case 0xE0: return sprintf(text, "ACC");
+	case 0xF0: return sprintf(text, "B");
+	default: return sprintf(text, "%.2XH", address);
 	}
 }
 
-/* Return as Text the decoded BitAddress */
+/* Return as text the decoded bit address */
 static void
-cpu8051_IntMemBitInfo(uint8_t bit_address, char *text)
+cpu8051_int_mem_bit_info(uint8_t bit_address, char *text)
 {
 	uint8_t byte_address;
 	uint8_t bit_number;
 	int len;
 
-	cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number);
+	mem_convert_bit_address(bit_address, &byte_address, &bit_number);
 
-	len = cpu8051_SFRMemInfo(byte_address, text);
+	len = cpu8051_sfr_mem_info(byte_address, text);
 	sprintf(&text[len], ".%X", bit_address);
 }
 
-/* Get instruction size from opcode */
-int
-cpu8051_get_instruction_size(unsigned char opcode)
-{
-	return InstSizesTbl[opcode];
-}
-
 /* Display instruction mnemonic. */
-void
-cpu8051_disasm_mnemonic(unsigned char OpCode, char *buf)
+int
+cpu8051_disasm_mnemonic(unsigned char opcode, char *buf)
 {
-	sprintf(buf, "%s", InstTextTbl[InstTypesTbl[OpCode]]);
+	return sprintf(buf, "%s", opcodes_get_instr_type_str(opcode));
 }
 
 /* Disasm instruction arguments starting at address into a text string */
@@ -475,60 +419,63 @@ void
 cpu8051_disasm_args(unsigned int address, char *buf)
 {
 	int len = 0;
-	char TextTmp[20];
-	unsigned char OpCode;
-	int ArgTblOfs;
+	char str[20];
+	unsigned char opcode;
+	int args_table_offset;
 	int i;
 
-	OpCode = memory_read8(PGM_MEM_ID, address);
-	ArgTblOfs = OpCode << 2;
+	buf[0] = '\0';
+
+	opcode = mem_read8(PGM_MEM_ID, address);
+	args_table_offset = opcode << 2;
 	address++;
 
 	/*
-	 * MOV direct, direct (OpCode 85h) is peculiar, the operands
+	 * MOV direct, direct (opcode 85h) is peculiar, the operands
 	 * are inverted
 	 */
-	if (OpCode == 0x85) {
-		cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address + 1),
-				   TextTmp);
-		len += sprintf(&buf[len], "%s,", TextTmp);
-		cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address),
-				   TextTmp);
-		len += sprintf(&buf[len], "%s", TextTmp);
+	if (opcode == 0x85) {
+		cpu8051_sfr_mem_info(mem_read8(PGM_MEM_ID, address + 1),
+				     str);
+		len += sprintf(&buf[len], "%s,", str);
+		cpu8051_sfr_mem_info(mem_read8(PGM_MEM_ID, address),
+				     str);
+		len += sprintf(&buf[len], "%s", str);
 		address += 2;
 		return;
 	}
 
-	for (i = 1; i <= InstArgTbl[ArgTblOfs]; i++) {
-		switch (InstArgTbl[ArgTblOfs + i]) {
+	for (i = 1; i <= opcodes_get_instr_arg_type_id(args_table_offset);
+	     i++) {
+		switch (opcodes_get_instr_arg_type_id(args_table_offset + i)) {
 		case ADDR11: {
 			len += sprintf(&buf[len],
-				       "%.4XH", ((OpCode << 3) & 0xF00) +
-				       (memory_read8(PGM_MEM_ID, address)));
+				       "%.4XH", ((opcode << 3) & 0xF00) +
+				       (mem_read8(PGM_MEM_ID, address)));
 			address++;
 			break;
 		}
 		case ADDR16: {
 			len += sprintf(
 				&buf[len], "%.4XH",
-				((memory_read8(PGM_MEM_ID, address) << 8) +
-				 memory_read8(PGM_MEM_ID, address + 1)));
+				((mem_read8(PGM_MEM_ID, address) << 8) +
+				 mem_read8(PGM_MEM_ID, address + 1)));
 			address += 2;
 			break;
 		}
 		case DIRECT: {
-			cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, address),
-					   TextTmp);
-			len += sprintf(&buf[len], "%s", TextTmp);
+			cpu8051_sfr_mem_info(mem_read8(PGM_MEM_ID, address),
+					     str);
+			len += sprintf(&buf[len], "%s", str);
 			address++;
 			break;
 		}
 		case BITADDR: {
-			cpu8051_IntMemBitInfo(
-				(memory_read8(PGM_MEM_ID, address) & 0xF8),
-				TextTmp);
-			len += sprintf(&buf[len], "%s.%X" , TextTmp,
-				       (memory_read8(PGM_MEM_ID, address) & 7));
+			cpu8051_int_mem_bit_info(
+				(mem_read8(PGM_MEM_ID, address) & 0xF8),
+				str);
+			len += sprintf(&buf[len], "%s.%X" , str,
+				       (mem_read8(PGM_MEM_ID, address) & 7));
 			address++;
 			break;
 		}
@@ -536,169 +483,77 @@ cpu8051_disasm_args(unsigned int address, char *buf)
 			address++;
 			len += sprintf(&buf[len], "%.4XH", (address & 0xFF00) +
 				       (((address & 0xFF) +
-					 memory_read8(PGM_MEM_ID,
-						      address - 1)) & 0xFF));
+					 mem_read8(PGM_MEM_ID,
+						   address - 1)) & 0xFF));
 			break;
 		}
 		case DATAIMM: {
 			len += sprintf(&buf[len], "#%.2XH",
-				       memory_read8(PGM_MEM_ID, address));
+				       mem_read8(PGM_MEM_ID, address));
 			address++;
 			break;
 		}
 		case DATA16: {
 			len += sprintf(&buf[len], "#%.4XH",
-				       ((memory_read8(PGM_MEM_ID,
-						      address) << 8) +
-					memory_read8(PGM_MEM_ID, address+1)));
+				       ((mem_read8(PGM_MEM_ID,
+						   address) << 8) +
+					mem_read8(PGM_MEM_ID, address+1)));
 			address += 2;
 			break;
 		}
 		case CBITADDR: {
-			cpu8051_IntMemBitInfo((memory_read8(PGM_MEM_ID,
+			cpu8051_int_mem_bit_info((mem_read8(PGM_MEM_ID,
 							    address) & 0xF8),
-					      TextTmp);
-			len += sprintf(&buf[len], "/%s.%X", TextTmp,
-				       (memory_read8(PGM_MEM_ID, address) & 7));
+						 str);
+			len += sprintf(&buf[len], "/%s.%X", str,
+				       (mem_read8(PGM_MEM_ID, address) & 7));
 			address++;
 			break;
 		}
 		default: {
 			len += sprintf(&buf[len], "%s",
-				       ArgsTextTbl[InstArgTbl[ArgTblOfs + i]]);
+				       opcodes_get_instr_arg_type_str(
+					       args_table_offset + i));
 		}
 		}
-		if (i < InstArgTbl[ArgTblOfs])
+		if (i < opcodes_get_instr_arg_type_id(args_table_offset))
 			len += sprintf(&buf[len], ",");
 	}
 }
 
-/* Disasm one instruction at Address into a Text string */
+/* Disasm one instruction at address into a Text string */
 int
-cpu8051_Disasm(unsigned int Address, char *Text)
+cpu8051_disasm(unsigned int address, char *text)
 {
 	int len = 0;
-	char TextTmp[20];
-	unsigned char OpCode;
-	int ArgTblOfs;
-	int InstSize;
+	unsigned char opcode;
+	int inst_size;
 	int i;
 
 	/* Display address. */
-	len += sprintf(Text, " %.4X ", Address);
+	len += sprintf(text, " %.4X ", address);
 
-	OpCode = memory_read8(PGM_MEM_ID, Address);
-	InstSize = InstSizesTbl[OpCode];
+	opcode = mem_read8(PGM_MEM_ID, address);
+	inst_size = opcodes_get_instr_size(opcode);
 
 	/* Display hex bytes. */
-	for (i = 0; i < InstSize; i++)
-		len += sprintf(&Text[len], " %.2X",
-				      memory_read8(PGM_MEM_ID, Address + i));
-
-	Address++;
+	for (i = 0; i < inst_size; i++)
+		len += sprintf(&text[len], " %.2X",
+			       mem_read8(PGM_MEM_ID, address + i));
 
 	/* Padd remaining area with spaces. */
 	for (; len < 17;)
-		len += sprintf(&Text[len], " ");
+		len += sprintf(&text[len], " ");
 
 	/* Display instruction mnemonic. */
-	len += sprintf(&Text[len], "%s ",
-			      InstTextTbl[InstTypesTbl[OpCode]]);
-	ArgTblOfs = OpCode << 2;
+	len += cpu8051_disasm_mnemonic(opcode, &text[len]);
 
 	/* Padd remaining area with spaces. */
 	for (; len < 25;)
-		len += sprintf(&Text[len], " ");
+		len += sprintf(&text[len], " ");
 
 	/* Display instruction arguments. */
+	cpu8051_disasm_args(address, &text[len]);
 
-	/*
-	 * MOV direct, direct (OpCode 85h) is peculiar, the operands
-	 * are inverted
-	 */
-	if (OpCode == 0x85) {
-		cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address + 1),
-				   TextTmp);
-		len += sprintf(&Text[len], "%s,", TextTmp);
-		cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address),
-				   TextTmp);
-		len += sprintf(&Text[len], "%s", TextTmp);
-		Address += 2;
-		return InstSize;
-	}
-
-	for (i = 1; i <= InstArgTbl[ArgTblOfs]; i++) {
-		switch (InstArgTbl[ArgTblOfs + i]) {
-		case ADDR11: {
-			len += sprintf(&Text[len],
-				       "%.4XH", ((OpCode << 3) & 0xF00) +
-				       (memory_read8(PGM_MEM_ID, Address)));
-			Address++;
-			break;
-		}
-		case ADDR16: {
-			len += sprintf(
-				&Text[len], "%.4XH",
-				((memory_read8(PGM_MEM_ID, Address) << 8) +
-				 memory_read8(PGM_MEM_ID, Address + 1)));
-			Address += 2;
-			break;
-		}
-		case DIRECT: {
-			cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address),
-					   TextTmp);
-			len += sprintf(&Text[len], "%s", TextTmp);
-			Address++;
-			break;
-		}
-		case BITADDR: {
-			cpu8051_IntMemBitInfo(
-				(memory_read8(PGM_MEM_ID, Address) & 0xF8),
-				TextTmp);
-			len += sprintf(&Text[len], "%s.%X" , TextTmp,
-				       (memory_read8(PGM_MEM_ID, Address) & 7));
-			Address++;
-			break;
-		}
-		case RELADDR: {
-			Address++;
-			len += sprintf(&Text[len], "%.4XH", (Address & 0xFF00) +
-				       (((Address & 0xFF) +
-					 memory_read8(PGM_MEM_ID,
-						      Address - 1)) & 0xFF));
-			break;
-		}
-		case DATAIMM: {
-			len += sprintf(&Text[len], "#%.2XH",
-				       memory_read8(PGM_MEM_ID, Address));
-			Address++;
-			break;
-		}
-		case DATA16: {
-			len += sprintf(&Text[len], "#%.4XH",
-				       ((memory_read8(PGM_MEM_ID,
-						      Address) << 8) +
-					memory_read8(PGM_MEM_ID, Address+1)));
-			Address += 2;
-			break;
-		}
-		case CBITADDR: {
-			cpu8051_IntMemBitInfo((memory_read8(PGM_MEM_ID,
-							    Address) & 0xF8),
-					      TextTmp);
-			len += sprintf(&Text[len], "/%s.%X", TextTmp,
-				       (memory_read8(PGM_MEM_ID, Address) & 7));
-			Address++;
-			break;
-		}
-		default: {
-			len += sprintf(&Text[len], "%s",
-				       ArgsTextTbl[InstArgTbl[ArgTblOfs + i]]);
-		}
-		}
-		if (i < InstArgTbl[ArgTblOfs])
-			len += sprintf(&Text[len], ",");
-	}
-
-	return InstSize;
+	return inst_size;
 }