X-Git-Url: http://gitweb.hugovil.com/?a=blobdiff_plain;f=src%2Fcpu8051.c;h=55e761a75e4a4c431b23d406df6c9ff4218bb22e;hb=8d9b71ab3848729da1cf90a38a599be0b08cbb5c;hp=b83175d55f82916297bf54036744cd0c10caef77;hpb=ae3a0ccd898b3257b93437e1007a2d595461ac5b;p=emu8051.git

diff --git a/src/cpu8051.c b/src/cpu8051.c
index b83175d..55e761a 100644
--- a/src/cpu8051.c
+++ b/src/cpu8051.c
@@ -28,6 +28,7 @@
 #include "reg8051.h"
 #include "cpu8051.h"
 #include "memory.h"
+#include "psw.h"
 #include "disasm.h"
 #include "instructions_8051.h"
 
@@ -95,6 +96,8 @@ ToggleBreakpoint(unsigned int address)
 void
 cpu8051_init(void)
 {
+	memory_init();
+
 	cpu8051.pc = 0;
 	cpu8051.clock = 0;
 	cpu8051.active_priority = -1;
@@ -105,24 +108,20 @@ cpu8051_init(void)
 void
 cpu8051_Reset(void)
 {
-	int i;
-
 	cpu8051.pc = 0;
 	cpu8051.clock = 0;
 	cpu8051.active_priority = -1;
 
-	/* Reset registers */
+	/* Clear IRAM and SFR. */
+	memory_clear(INT_MEM_ID);
 
-	for (i = 0; i < 256; i++) {
-		/* Clear  IRAM and SFR */
-		memory_write8(INT_MEM_ID, i, 0);
-	}
+	memory_sfr_write8(_P0_, 0xFF);
+	memory_sfr_write8(_P1_, 0xFF);
+	memory_sfr_write8(_P2_, 0xFF);
+	memory_sfr_write8(_P3_, 0xFF);
 
-	memory_write8(INT_MEM_ID, _P0_, 0xFF);
-	memory_write8(INT_MEM_ID, _P1_, 0xFF);
-	memory_write8(INT_MEM_ID, _P2_, 0xFF);
-	memory_write8(INT_MEM_ID, _P3_, 0xFF);
-	memory_write8(INT_MEM_ID, _SP_, 0x07);
+	/* The default value of SP (after system reset) is 07 */
+	memory_sfr_write8(_SP_, 0x07);
 }
 
 static void
@@ -213,12 +212,7 @@ cpu8051_ReadB(uint8_t bit_address)
 static void
 cpu8051_process_interrupt(int pc, int pri)
 {
-	unsigned char SP;
-
-	SP = cpu8051_ReadD(_SP_);
-	cpu8051_WriteI(++SP, (cpu8051.pc & 0xFF));
-	cpu8051_WriteI(++SP, (cpu8051.pc >> 8));
-	cpu8051_WriteD(_SP_, SP);
+	stack_push16(pc);
 	cpu8051.pc = 0x0B;
 	cpu8051.active_priority = pri;
 }
@@ -381,6 +375,12 @@ cpu8051_Exec(void)
 	cpu8051.pc++;
 	insttiming = (*opcode_table[opcode])(); /* Function callback. */
 
+	/*
+	 * Parity bit (p): is automatically set or cleared in each machine
+	 * cycle to establish even parity in the accumulator.
+	 */
+	psw_compute_parity_bit();
+
 	for (i = 0; i < insttiming; i++) {
 		cpu8051_CheckInterrupts();
 		cpu8051_DoTimers();