From: Hugo Villeneuve <hugo@hugovil.com>
Date: Thu, 28 Nov 2013 01:55:21 +0000 (-0500)
Subject: Add tests for timers mode 2
X-Git-Tag: v2.0.0~41
X-Git-Url: http://gitweb.hugovil.com/?a=commitdiff_plain;h=bdc8dc1d31b3eb408417c4aef61854cb0a8f3e92;p=emu8051.git

Add tests for timers mode 2
---

diff --git a/tests/Makefile.am b/tests/Makefile.am
index 51a5814..53f352b 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -7,7 +7,7 @@ SUFFIXES = .hex .asm
 TESTS = \
     opcodes
 
-check_PROGRAMS = mul1.hex mul2.hex div.hex orl.hex anl.hex mov.hex timer0.hex timer1.hex
+check_PROGRAMS = mul1.hex mul2.hex div.hex orl.hex anl.hex mov.hex timer0.hex timer1.hex timer2.hex
 
 mul1.hex: mul1.asm
 mul2.hex: mul2.asm
@@ -17,6 +17,7 @@ anl.hex: anl.asm
 mov.hex: mov.asm
 timer0.hex: timer0.asm
 timer1.hex: timer1.asm
+timer2.hex: timer2.asm
 
 .asm.hex:
 	$(AS51) $<
diff --git a/tests/timer2.asm b/tests/timer2.asm
new file mode 100644
index 0000000..790a216
--- /dev/null
+++ b/tests/timer2.asm
@@ -0,0 +1,55 @@
+; Test program to verify correct emu8051 operation
+;
+; Test desc: timers
+; Test output: PC = $FFF0
+; Test output: SP = $60
+; Test output: R0 = $80
+; Test output: R1 = $16
+; Test output: R2 = $F4
+; Test output: R3 = $3E
+; Test output: TIMER0 = $8086
+; Test output: TIMER1 = $F4F9
+; Test output: TCON = $A0
+; Test output: TMOD = $22
+; Test output: PSW = $00
+
+TOS     EQU     60h     ; Adresse du dessus de la pile.
+
+        CSEG
+
+        ORG     0000h           ; Reset vector
+        MOV     SP,#TOS         ; Init stack pointer
+
+        MOV     TMOD,#00100010B ; Init timers 0 and 1 as 8-bit timers (TL),
+                                ; reloaded with TH when overflow occurs.
+
+        ;;  First test: no overflow
+	MOV	TH0,#080h       ; Reload value
+	MOV	TH1,#0F4h       ; Reload value
+	MOV	TL0,#00h        ; Set initial value of timer0
+       	MOV	TL1,#28h        ; Set initial value of timer1
+        CALL    DELAY
+
+        MOV     00h, TH0         ; Save value of timer 0
+        MOV     01h, TL0
+        MOV     02h, TH1         ; Save value of timer 1
+        MOV     03h, TL1
+        MOV     04h, TCON
+
+        ;;  Second test: overflow
+	MOV	TL0,#0F0h        ; Set initial value of timer0
+	MOV	TL1,#0EFh        ; Set initial value of timer1
+        CALL    DELAY
+
+        LJMP    0FFF0h
+
+        ;; Loop of ~25 cycles
+DELAY:
+	MOV	B,#10
+       	ORL     TCON,#50h	; Timer 0 and timer 1 ON.
+B1:
+	DJNZ	B,B1
+        ANL     TCON,#0AFh      ; Stop both timers
+        RET
+
+        END