From 4c305c73f8110d03b99cec045b3c5741867fd46b Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Fri, 14 May 2004 05:10:08 +0000 Subject: [PATCH] Modify generated files for 8051 instructions Seems to be working good. --- autogen.sh | 2 +- configure.in | 9 +- src/CPU8051.cpp | 644 ----- src/CPU8051.hpp | 62 - src/EmuGtk.hpp | 110 - src/Inst_Def.hpp | 266 -- src/Inst_Imp.cpp | 4208 ------------------------------ src/Makefile.am | 21 +- src/MemWin.hpp | 29 - src/Memory.cpp | 51 - src/Memory.hpp | 24 - src/Opcode2cpp.pl | 785 ------ src/PgmWin.hpp | 41 - src/Reg8051.hpp | 44 - src/RegWin.hpp | 26 - src/cpu8051.c | 616 +++++ src/cpu8051.h | 59 + src/{EmuGtk.cpp => emugtk.c} | 546 ++-- src/emugtk.h | 52 + src/file.c | 5 +- src/file.h | 3 +- src/{GtkSizes.hpp => gtksizes.h} | 0 src/memory.c | 103 + src/memory.h | 26 + src/{MemWin.cpp => memwin.c} | 90 +- src/memwin.h | 21 + src/opcode2c.pl | 807 ++++++ src/{PgmWin.cpp => pgmwin.c} | 113 +- src/pgmwin.h | 43 + src/reg8051.h | 49 + src/{RegWin.cpp => regwin.c} | 79 +- src/regwin.h | 19 + 32 files changed, 2248 insertions(+), 6705 deletions(-) delete mode 100644 src/CPU8051.cpp delete mode 100644 src/CPU8051.hpp delete mode 100644 src/EmuGtk.hpp delete mode 100644 src/Inst_Def.hpp delete mode 100644 src/Inst_Imp.cpp delete mode 100644 src/MemWin.hpp delete mode 100644 src/Memory.cpp delete mode 100644 src/Memory.hpp delete mode 100755 src/Opcode2cpp.pl delete mode 100644 src/PgmWin.hpp delete mode 100644 src/Reg8051.hpp delete mode 100644 src/RegWin.hpp create mode 100644 src/cpu8051.c create mode 100644 src/cpu8051.h rename src/{EmuGtk.cpp => emugtk.c} (60%) create mode 100644 src/emugtk.h rename src/{GtkSizes.hpp => gtksizes.h} (100%) create mode 100644 src/memory.c create mode 100644 src/memory.h rename src/{MemWin.cpp => memwin.c} (58%) create mode 100644 src/memwin.h create mode 100755 src/opcode2c.pl rename src/{PgmWin.cpp => pgmwin.c} (65%) create mode 100644 src/pgmwin.h create mode 100644 src/reg8051.h rename src/{RegWin.cpp => regwin.c} (64%) create mode 100644 src/regwin.h diff --git a/autogen.sh b/autogen.sh index 354ca4e..cd7a53c 100755 --- a/autogen.sh +++ b/autogen.sh @@ -4,7 +4,7 @@ PROJECT=Emu8051 TEST_TYPE=-f -TEST_FILE=src/CPU8051.cpp +TEST_FILE=src/cpu8051.c ACLOCAL_FLAGS="${ACLOCAL_FLAGS} -I config" diff --git a/configure.in b/configure.in index bf26784..7fea444 100644 --- a/configure.in +++ b/configure.in @@ -3,7 +3,7 @@ dnl Initialization stuff. AC_INIT(emu8051, 0.2.0) AC_CONFIG_AUX_DIR(config) -AC_CONFIG_SRCDIR(src/CPU8051.cpp) +AC_CONFIG_SRCDIR(src/cpu8051.c) AM_CONFIG_HEADER(config.h:config-h.in) dnl Checking if the NEWS file has been updated to reflect the current version. AM_INIT_AUTOMAKE(check-news) @@ -46,14 +46,7 @@ else LIBS="${LIBS} ${GTK_LIBS}",AC_MSG_ERROR(GTK+-2.0 not found!))dnl fi -dnl Tests the C++ compiler -AC_PROG_CXX -AC_LANG_CPLUSPLUS - -CXXFLAGS="${CFLAGS}" - AC_SUBST(CFLAGS) -AC_SUBST(CXXFLAGS) AC_SUBST(LIBS) AC_SUBST(ac_aux_dir) diff --git a/src/CPU8051.cpp b/src/CPU8051.cpp deleted file mode 100644 index b0a45de..0000000 --- a/src/CPU8051.cpp +++ /dev/null @@ -1,644 +0,0 @@ -// CPU8051.cpp - -#include -#include -#include "CPU8051.hpp" -#include "disasm.hpp" - -////////////////////////////////////////////////////////////////////////////// -// CPU8051::CPU8051( ) -// CPU8051 constructor -////////////////////////////////////////////////////////////////////////////// -CPU8051::CPU8051( ) -{ - InitFuncPtr( ); - // Cree les objets Memory - SFRMem = new Memory( 128 ); - PGMMem = new Memory( 65536 ); - IntMem = new Memory( 128 ); - ExtMem = new Memory( 65536 ); - PC = 0; CLOCK = 0; ActivePriority = -1; -} - -////////////////////////////////////////////////////////////////////////////// -// CPU8051::~CPU8051( ) -// CPU8051 destructor -////////////////////////////////////////////////////////////////////////////// -CPU8051::~CPU8051( ) -{ - // Detruit les objets Memory - delete SFRMem; - delete PGMMem; - delete IntMem; - delete ExtMem; - - SFRMem = 0; - PGMMem = 0; - IntMem = 0; - ExtMem = 0; - PC = 0; - CLOCK = 0; -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::Exec( ) -// Execute at address PC from PGMMem -////////////////////////////////////////////////////////////////////////////// -void CPU8051::Exec( ) -{ -int i; -unsigned char opcode = PGMMem->Read8( PC++ ); -int insttiming = ( this->*funcptr[ opcode ] )(); - -for ( i = 0; i < insttiming; i++) - { - CheckInterrupts(); - DoTimers(); - CLOCK++; - } -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned int CPU8051::GetNextAddress( ) -// Return PC + size in bytes of current instruction -////////////////////////////////////////////////////////////////////////////// -unsigned int CPU8051::GetNextAddress( ) -{ -return ( PC + InstSizesTbl[ PGMMem->Read8( PC ) ] ); -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::Reset( ) -// Reset the registers and CPU state -////////////////////////////////////////////////////////////////////////////// -void CPU8051::Reset( ) -{ - PC = 0; CLOCK = 0; ActivePriority = -1; - // Reinitialisation des registres - int i; - for ( i = 0; i < 128; i++ ) - { - SFRMem->Write8( i, 0 ); - IntMem->Write8( i, 0 ); - } - SFRMem->Write8( _P0_ - 0x80, 0xFF ); - SFRMem->Write8( _P1_ - 0x80, 0xFF ); - SFRMem->Write8( _P2_ - 0x80, 0xFF ); - SFRMem->Write8( _P3_ - 0x80, 0xFF ); - SFRMem->Write8( _SP_ - 0x80, 0x07 ); -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned int CPU8051::GetPC( ) -// Return the value of PC register -////////////////////////////////////////////////////////////////////////////// -unsigned int CPU8051::GetPC( ) -{ - return PC; -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::SetPC( unsigned int NewPC ) -// Set the new value of PC register -////////////////////////////////////////////////////////////////////////////// -void CPU8051::SetPC( unsigned int NewPC ) -{ - PC = NewPC; -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WriteD( unsigned int Address, unsigned char Value ) -// Write with a direct addressing mode at Address the new Value -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WriteD( unsigned int Address, unsigned char Value ) -{ - if ( Address > 0x7F ) { SFRMem->Write8( Address - 0x80, Value ); return; } - IntMem->Write8( Address, Value ); -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WriteExt( unsigned int Address, unsigned char Value ) -// Ecriture d'une valeur dans la memoire externe ( Address = $00 a $FFFF ) -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WriteExt( unsigned int Address, unsigned char Value ) -{ - ExtMem->Write8( Address, Value ); - return; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WriteInt( unsigned int Address, unsigned char Value ) -// Ecriture d'une valeur dans la memoire interne ( Address = $00 a $FF ) -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WriteInt( unsigned int Address, unsigned char Value ) -{ - if ( Address > 0x7F ) - SFRMem->Write8( Address - 0x80, Value ); - else - IntMem->Write8( Address, Value ); - return; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WriteI( unsigned int Address, unsigned char Value ) -// Write with an indirect addressing mode at Address the new Value -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WriteI( unsigned int Address, unsigned char Value ) -{ - if ( Address > 0x7F ) { ExtMem->Write8( Address, Value ); return; } - IntMem->Write8( Address, Value ); -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WritePGM( unsigned int Address, unsigned char Value ) -// Write at Address the new Value in PGMMem -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WritePGM( unsigned int Address, unsigned char Value ) -{ - PGMMem->Write8( Address, Value ); -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadD( unsigned int Address ) -// Read with a direct addressing mode at Address -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadD( unsigned int Address ) -{ - if ( Address > 0xFF ) return ExtMem->Read8( Address ); - if ( Address > 0x7F ) return SFRMem->Read8( Address - 0x80 ); - return IntMem->Read8( Address ); -} - - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadInt( unsigned int Address ) -// Read Internal data memory at Address -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadInt( unsigned int Address ) -{ - if ( Address > 0x7F ) - return SFRMem->Read8( Address - 0x80 ); - return IntMem->Read8( Address ); -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadExt( unsigned int Address ) -// Lecture du contenu de la memoire externe -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadExt( unsigned int Address ) -{ - return ExtMem->Read8( Address ); -} - - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadI( unsigned int Address ) -// Read with a indirect addressing mode at Address -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadI( unsigned int Address ) -{ - if ( Address > 0x7F ) return ExtMem->Read8( Address ); - return IntMem->Read8( Address ); -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadPGM( unsigned int Address ) -// Read at Address from PGMMem -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadPGM( unsigned int Address ) -{ - return PGMMem->Read8( Address ); -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::WriteB( unsigned int BitAddress, unsigned char Value ) -// Write with a bit addressing mode at BitAddress the new Value -////////////////////////////////////////////////////////////////////////////// -void CPU8051::WriteB( unsigned int BitAddress, unsigned char Value ) -{ -unsigned int ByteAddress, BitNumber; -unsigned char ByteValue, ByteMask; - if ( BitAddress > 0x7F ) { - // SFR 80-FF - ByteAddress = BitAddress & 0xF8; - BitNumber = BitAddress & 0x07; - } - else { - // 20-2F - ByteAddress = ( BitAddress >> 3 ) + 0x20; - BitNumber = BitAddress & 0x07; - } - ByteMask = ( ( 1 << BitNumber ) ^ 0xFF ); - ByteValue = ReadD( ByteAddress ) & ByteMask; - ByteValue += Value << BitNumber; - WriteD( ByteAddress, ByteValue ); -} - - -////////////////////////////////////////////////////////////////////////////// -// unsigned char CPU8051::ReadB( unsigned int BitAddress ) -// Read with a bit addressing mode at BitAddress -////////////////////////////////////////////////////////////////////////////// -unsigned char CPU8051::ReadB( unsigned int BitAddress ) -{ -unsigned int ByteAddress, BitNumber; -unsigned char BitValue; - if ( BitAddress > 0x7F ) { - // SFR 80-FF - ByteAddress = BitAddress & 0xF8; - BitNumber = BitAddress & 0x07; - } - else { - // 20-2F - ByteAddress = ( BitAddress >> 3 ) + 0x20; - BitNumber = BitAddress & 0x07; - } - BitValue = ( ReadD( ByteAddress ) >> BitNumber ); - BitValue &= 1; - return BitValue; -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::CheckInterrupts() -// Check interrupts state and process them as needed -////////////////////////////////////////////////////////////////////////////// -void CPU8051::CheckInterrupts() -{ -unsigned char SP; - - if ( ReadD( _IE_ ) & 0x80 ) { - for ( int i = 1; i >= 0; i-- ) - if ( ActivePriority < i ) { -//------------------------- External interrupt 0 ---------------------------- -// if ( ( ReadD( _IE_ ) & 0x01 ) && ( ( ReadD( _IP_ ) & 0x01 ) ? i : !i ) && pin0 ) -//-------------------------- Interrupt timer 0 ------------------------------- - if ( ( ReadD( _IE_ ) & 0x02 ) && ( ( ReadD( _IP_ & 0x02 ) ? i : !i ) && ( ReadD( _TCON_ ) & 0x20 ) ) ){ - WriteD( _TCON_, ReadD( _TCON_ ) & 0xDF ); - SP = ReadD( _SP_ ); - WriteI( ++SP, ( PC & 0xFF ) ); - WriteI( ++SP, ( PC >> 8 ) ); - WriteD( _SP_, SP ); - PC = 0x0B; - ActivePriority = i; - return; - } -//-------------------------- External interrupt 1 ---------------------------- -// if ( ( ReadD( _IE_ ) & 0x04 ) && ( ( ReadD( _IP_ ) & 0x04 ) ? i : !i ) && pin1 ) -//-------------------------- Interrupt timer 1 ------------------------------- - if ( ( ReadD( _IE_ ) & 0x08 ) && ( ( ReadD( _IP_ ) & 0x08 ) ? i : !i ) && ( ReadD( _TCON_ ) & 0x80 ) ) { - WriteD( _TCON_, ReadD( _TCON_ ) & 0x7F ); - SP = ReadD( _SP_ ); - WriteI( ++SP, ( PC & 0xFF ) ); - WriteI( ++SP, ( PC >> 8 ) ); - WriteD( _SP_, SP ); - PC = 0x1B; - ActivePriority = i; - return; - } -//-------------------------- Serial Interrupts ------------------------------- - if ( ( ReadD( _IE_ ) & 0x10 ) && ( ( ReadD( _IP_ ) & 0x10 ) ? i : !i ) && ( ReadD( _SCON_ ) & 0x03 ) ) { - SP = ReadD( _SP_ ); - WriteI( ++SP, ( PC & 0xFF ) ); - WriteI( ++SP, ( PC >> 8 ) ); - WriteD( _SP_, SP ); - PC = 0x23; - ActivePriority = i; - return; - } -//-------------------------- Interrupt timer 2 ------------------------------- - if ( ( ReadD( _IE_ ) & 0x20 ) && ( ( ReadD( _IP_ ) & 0x20 ) ? i : !i ) && ( ReadD( _T2CON_ ) & 0x80 ) ) { - SP = ReadD( _SP_ ); - WriteI( ++SP, ( PC & 0xFF ) ); - WriteI( ++SP, ( PC >> 8 ) ); - WriteD( _SP_, SP ); - PC = 0x2B; - ActivePriority = i; - return; - } - } - } -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::DoTimers( ) -// Execute les timers -////////////////////////////////////////////////////////////////////////////// -void CPU8051::DoTimers( ) -{ - unsigned int tmp; - unsigned int TR; - unsigned int MODE; - unsigned int GATE; - unsigned int TimerCounter; - - // ----- Timer 0 - TR = ReadD( _TCON_ ) & 0x10; - MODE = ReadD( _TMOD_ ) & 0x03; - GATE = ReadD( _TMOD_ ) & 0x08; - TimerCounter = ReadD( _TMOD_ ) & 0x04; - - if ( ( TR && !GATE && !TimerCounter ) || ( MODE == 3 ) ) - switch( MODE ) { - // Mode 0, compteur de 13 bits. - case 0 : - tmp = ReadD( _TH0_ ) * 0x100 + ReadD( _TL0_ ); - ++tmp &= 0x1FFF; // On ne garde que 13 bits. - if ( tmp == 0 ) // If overflow set TF0 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x20 ); - WriteD( _TH0_, tmp / 0x100 ); - WriteD( _TL0_, tmp & 0xFF ); - break; - - // Mode 1, compteur de 16 bits. - case 1 : - tmp = ReadD( _TH0_ ) * 0x100 + ReadD( _TL0_ ); - ++tmp &= 0xFFFF; // On ne garde que 16 bits. - if ( tmp == 0 ) // If overflow set TF0 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x20 ); - WriteD( _TH0_, ( tmp / 0x100 ) ); - WriteD( _TL0_, ( tmp & 0xFF ) ); - break; - - // Mode 2, Compteur de 8 bits avec Auto-Reload - case 2 : - tmp = ReadD( _TL0_ ); - ++tmp &= 0xFF; - if ( tmp == 0 ) { // If overflow -> reload et set TF0 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x20 ); - WriteD( _TL0_, ReadD( _TH0_ ) ); - } - else - WriteD( _TL0_, tmp ); - break; - - // Mode 3 : TL0 et TH0 sont 2 Timers independants de 8 bits chacuns. - case 3 : - if ( TR && !GATE && !TimerCounter ) { - tmp = ReadD( _TL0_ ); - ++tmp &= 0xFF; - if ( tmp == 0 ) // If TL0 overflow set TF0 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x20 ); - WriteD( _TL0_, tmp ); - } // TH0 utilise TR1 et TF1. - TR = ReadD( _TCON_ ) & 0x40; - if ( TR ) { - tmp = ReadD( _TH0_ ); - ++tmp &= 0xFF; - if ( tmp == 0 ) // If TH0 overflow set TF1 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x80 ); // TF1 = 1. - WriteD( _TH0_, tmp ); - } - break; - }; - - - // ----- Timer 1 - TR = ReadD( _TCON_ ) & 0x40; - MODE = ( ReadD( _TMOD_ ) & 0x30 ) >> 4 ; - GATE = ReadD( _TMOD_ ) & 0x80; - TimerCounter = ReadD( _TMOD_ ) & 0x40; - - if ( TR && !GATE && !TimerCounter ) - switch( MODE ) { - // Mode 0, compteur de 13 bits. - case 0 : - tmp = ReadD( _TH1_ ) * 0x100 + ReadD( _TL1_ ); - ++tmp &= 0x1FFF; // On ne garde que 13 bits. - if ( tmp == 0 ) // If overflow set TF1 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x80 ); - WriteD( _TH1_, tmp / 0x100 ); - WriteD( _TL1_, tmp & 0xFF ); - break; - - // Mode 1, compteur de 16 bits. - case 1 : - tmp = ReadD( _TH1_ ) * 0x100 + ReadD( _TL1_ ); - ++tmp &= 0xFFFF; // On ne garde que 16 bits. - if ( tmp == 0 ) // If overflow set TF1 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x80 ); - WriteD( _TH1_, ( tmp / 0x100 ) ); - WriteD( _TL1_, ( tmp & 0xFF ) ); - break; - - // Mode 2, Compteur de 8 bits avec Auto-Reload - case 2 : - tmp = ReadD( _TL1_ ); - ++tmp &= 0xFF; - if ( tmp == 0 ) { // If overflow -> reload et set TF1 - WriteD( _TCON_, ReadD( _TCON_ ) | 0x80 ); - WriteD( _TL1_, ReadD( _TH1_ ) ); - } - else - WriteD( _TL1_, tmp ); - break; - - // Mode 3 : mode inactif: retient la valeur de TH1 et TL1. - // Equivalent a TR1 = 0. - case 3 : - break; - - }; -} - - - -// Addressing modes defined in the order as they appear in disasm.hpp -// from table argstext[] -#define ADDR11 0 -#define ADDR16 1 -#define DIRECT 3 -#define BITADDR 14 -#define RELADDR 15 -#define DATAIMM 16 -#define DATA16 22 -#define CBITADDR 23 - -// SFR Memory map [80h - FFh] -// --------------------------------------------------------------- -// F8 | | | | | | | | | FF -// F0 | B | | | | | | | | F7 -// E8 | | | | | | | | | EF -// E0 | ACC | | | | | | | | E7 -// D8 | | | | | | | | | DF -// D0 | PSW | | | | | | | | D7 -// C8 | T2CON| |RCAP2L|RCAP2H| TL2 | TH2 | | | CF -// C0 | | | | | | | | | C7 -// B8 | IP | | | | | | | | BF -// B0 | P3 | | | | | | | | B7 -// A8 | IE | | | | | | | | AF -// A0 | P2 | | | | | | | | A7 -// 98 | SCON | SBUF | | | | | | | 9F -// 90 | P1 | | | | | | | | 97 -// 88 | TCON | TMOD | TL0 | TL1 | TH0 | TH1 | | | 8F -// 80 | P0 | SP | DPL | DPH | | | | PCON | 87 -// --------------------------------------------------------------- - -////////////////////////////////////////////////////////////////////////////// -// int CPU8051::SFRMemInfo( unsigned int Address, char *Text ) -// Return as Text the name of the SFR register at Address if any -////////////////////////////////////////////////////////////////////////////// - int CPU8051::SFRMemInfo( unsigned int Address, char *Text ) - { - switch( Address ) { - case 0x80 : return sprintf( Text, "P0" ); - case 0x81 : return sprintf( Text, "SP" ); - case 0x82 : return sprintf( Text, "DPL" ); - case 0x83 : return sprintf( Text, "DPH" ); - case 0x87 : return sprintf( Text, "PCON" ); - case 0x88 : return sprintf( Text, "TCON" ); - case 0x89 : return sprintf( Text, "TMOD" ); - case 0x8A : return sprintf( Text, "TL0" ); - case 0x8B : return sprintf( Text, "TL1" ); - case 0x8C : return sprintf( Text, "TH0" ); - case 0x8D : return sprintf( Text, "TH1" ); - case 0x90 : return sprintf( Text, "P1" ); - case 0x98 : return sprintf( Text, "SCON" ); - case 0x99 : return sprintf( Text, "SBUF" ); - case 0xA0 : return sprintf( Text, "P2" ); - case 0xA8 : return sprintf( Text, "IE" ); - case 0xB0 : return sprintf( Text, "P3" ); - case 0xB8 : return sprintf( Text, "IP" ); - case 0xC8 : return sprintf( Text, "T2CON" ); - case 0xCA : return sprintf( Text, "RCAP2L" ); - case 0xCB : return sprintf( Text, "RCAP2H" ); - case 0xCC : return sprintf( Text, "TL2" ); - case 0xCD : return sprintf( Text, "TH2" ); - case 0xD0 : return sprintf( Text, "PSW" ); - case 0xE0 : return sprintf( Text, "ACC" ); - case 0xF0 : return sprintf( Text, "B" ); - default : return sprintf( Text, "%.2XH", Address ); - } -} - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::IntMemBitInfo( unsigned int BitAddress, char *Text ) -// Return as Text the decoded BitAddress -////////////////////////////////////////////////////////////////////////////// -void CPU8051::IntMemBitInfo( unsigned int BitAddress, char *Text ) -{ -unsigned int ByteAddress, BitNumber; -int TextLength; - if ( BitAddress > 0x7F ) { - // SFR 80-FF - ByteAddress = BitAddress & 0xF8; - BitNumber = BitAddress & 0x07; - } - else { - // 20-2F - ByteAddress = ( BitAddress >> 3 ) + 0x20; - BitNumber = BitAddress & 0x07; - } - - TextLength = SFRMemInfo( ByteAddress, Text ); - // sprintf( &Text[ TextLength ], ".%X" ); - // Modified by Hugo Villeneuve to remove compilation warning - sprintf( &Text[ TextLength ], ".%X", BitAddress ); -} - - -////////////////////////////////////////////////////////////////////////////// -// int CPU8051::Disasm( unsigned int Address, char *Text ) -// Disasm one instruction at Address into a Text string -////////////////////////////////////////////////////////////////////////////// -int CPU8051::Disasm( unsigned int Address, char *Text ) -{ -int TextLength=0; -char TextTmp[20]; -unsigned char OpCode; -int ArgTblOfs; -int InstSize; -int i; - -OpCode = PGMMem->Read8( Address ); -InstSize = InstSizesTbl[ OpCode ]; -//printf("%.4X\n", Address); - -TextLength += sprintf( Text, " %.4X ", Address ); - -for (i = 0; i < InstSize; i++ ) - TextLength += sprintf( &Text[TextLength], " %.2X", PGMMem->Read8( Address + i ) ); - -Address++; - -for (; TextLength < 17; ) TextLength += sprintf( &Text[ TextLength ], " " ); - -TextLength += sprintf( &Text[ TextLength ], "%s ", InstTextTbl[ InstTypesTbl[ OpCode ] ] ); -ArgTblOfs = OpCode << 2; - -for (; TextLength < 25; ) TextLength += sprintf( &Text[ TextLength ], " " ); - - // MOV direct, direct (OpCode 85h) is peculiar, the operands are inverted - if ( OpCode == 0x85 ) { - SFRMemInfo( PGMMem->Read8( Address + 1 ), TextTmp ); - TextLength += sprintf( &Text[ TextLength ], "%s,", TextTmp ); - SFRMemInfo( PGMMem->Read8( Address ), TextTmp ); - TextLength += sprintf( &Text[ TextLength ], "%s", TextTmp ); - Address += 2; - return InstSize; - } - - for ( i = 1; i <= InstArgTbl[ ArgTblOfs ]; i++ ) { - switch( InstArgTbl[ ArgTblOfs + i ] ) { - case ADDR11 : { - TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( ( OpCode << 3) & 0xF00 ) + ( PGMMem->Read8( Address ) ) ); - Address++; - break; - } - case ADDR16 : { - TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( ( PGMMem->Read8( Address ) << 8 ) + PGMMem->Read8( Address + 1 ) ) ); - Address += 2; - break; - } - case DIRECT : { - SFRMemInfo( PGMMem->Read8( Address ), TextTmp ); - TextLength += sprintf( &Text[ TextLength ], "%s", TextTmp ); - Address++; - break; - } - case BITADDR : { - IntMemBitInfo( ( PGMMem->Read8( Address ) & 0xF8 ), TextTmp ); - TextLength += sprintf( &Text[ TextLength ], "%s.%X" , TextTmp, ( PGMMem->Read8( Address ) & 7 ) ); - Address++; - break; - } - case RELADDR : { - Address++; - TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( Address & 0xFF00 ) + ( ( ( Address & 0xFF ) + PGMMem->Read8( Address - 1 ) ) & 0xFF ) ); - break; - } - case DATAIMM : { - TextLength += sprintf( &Text[ TextLength ], "#%.2XH", PGMMem->Read8( Address ) ); - Address++; - break; - } - case DATA16 : { - TextLength += sprintf( &Text[ TextLength ],"#%.4XH", ( ( PGMMem->Read8( Address ) << 8 ) + PGMMem->Read8( Address+1 ) ) ); - Address += 2; - break; - } - case CBITADDR : { - IntMemBitInfo( ( PGMMem->Read8( Address ) & 0xF8 ), TextTmp ); - TextLength += sprintf( &Text[ TextLength ], "/%s.%X", TextTmp, ( PGMMem->Read8( Address ) & 7 ) ); - Address++; - break; - } - default : { - TextLength += sprintf( &Text[ TextLength ],"%s", ArgsTextTbl[ InstArgTbl[ ArgTblOfs + i ] ] ); - } - } - if (i < InstArgTbl[ ArgTblOfs ]) { TextLength += sprintf( &Text[ TextLength ], "," ); } - } - -return InstSize; -} - - -#include "Inst_Imp.cpp" - - - - - - diff --git a/src/CPU8051.hpp b/src/CPU8051.hpp deleted file mode 100644 index d51d8aa..0000000 --- a/src/CPU8051.hpp +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef _CPU8051_HPP_ -#define _CPU8051_HPP_ - -#include "Memory.hpp" -#include "Reg8051.hpp" - -#define BANKPSW ( ReadD( _PSW_ ) & 0x18 ) - -////////////////////////////////////////////////////////////////////////////// -// CPU8051 -// Implements the 8051 CPU Object -////////////////////////////////////////////////////////////////////////////// -class CPU8051 { -public: - CPU8051( ); - ~CPU8051( ); - - void Exec( ); - void Reset( ); - unsigned int GetPC( ); - void SetPC( unsigned int NewPC ); - void WriteD( unsigned int Address, unsigned char Value ); - void WriteExt( unsigned int Address, unsigned char Value ); - void WriteInt( unsigned int Address, unsigned char Value ); - void WriteI( unsigned int Address, unsigned char Value ); - void WritePGM( unsigned int Address, unsigned char Value ); - unsigned char ReadD( unsigned int Address ); - unsigned char ReadInt( unsigned int Address ); - unsigned char ReadExt( unsigned int Address ); - unsigned char ReadI( unsigned int Address ); - unsigned char ReadPGM( unsigned int Address ); - unsigned int GetNextAddress( ); - - void WriteB( unsigned int BitAddress, unsigned char Value ); - unsigned char ReadB( unsigned int BitAddress ); - - void CheckInterrupts( ); - void DoTimers( ); - - int SFRMemInfo( unsigned int Address, char *Text ); - void IntMemBitInfo( unsigned int BitAddress, char *Text ); - int Disasm( unsigned int Address, char *Text ); - -private: - Memory *SFRMem; - Memory *PGMMem; - Memory *IntMem; - Memory *ExtMem; - unsigned int PC; - unsigned long CLOCK; - int ActivePriority; - int (CPU8051::*funcptr[256])(); - - #include "Inst_Def.hpp" - -}; - - - - -#endif - diff --git a/src/EmuGtk.hpp b/src/EmuGtk.hpp deleted file mode 100644 index b94b784..0000000 --- a/src/EmuGtk.hpp +++ /dev/null @@ -1,110 +0,0 @@ -#ifndef _EMUGTK_HPP_ -#define _EMUGTK_HPP_ - -#include -#include -#include -#include "CPU8051.hpp" -#include "MemWin.hpp" -#include "PgmWin.hpp" -#include "RegWin.hpp" -#include "GtkSizes.hpp" -#include "exceptions.hpp" - -using namespace std; - - -////////////////////////////////////////////////////////////////////////////// -// EmuGtk -// Implements the Gtk+ Graphical User Interface as an Object -////////////////////////////////////////////////////////////////////////////// -class EmuGtk { -public: - EmuGtk( int argc , char **argv, CPU8051 *mCPU ); - ~EmuGtk( ); - - CPU8051 *CPU; /* Test */ - - void Main( ); - - void Reset( ); - void Step( ); - // void Step( ); - // void Exec( ); - - void AddButtons( ); - void ShowMenu( ); - - gboolean DeleteEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - void DestroyEvent( GtkWidget *widget, gpointer data ); - - void OpenEvent( GtkWidget *widget, gpointer data ); - void QuitEvent( GtkWidget *widget, gpointer data ); - void AboutEvent( GtkWidget *widget, gpointer data ); - - void ResetEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - void RunEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - void StopEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - void StepEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - - void StartRunning( ); - void StopRunning( ); - void Running( ); - - void UpdateDisplay(); - -private: - int EmuGtkID; - - int RunningState; - int RunFuncTag; - MemWin *memwin; - PgmWin *pgmwin; - RegWin *regwin; - GtkWidget *emuwin, *emufixed, *emumainfixed; - GtkWidget *regfrm, *pgmfrm, *memfrm; - GtkWidget *ButtonTable; - - // GdkPixmap *PixMapT, *PixMapRun, *PixMapR, *PixMapQ; - // GtkWidget *PixMapWidT, *PixMapWidRun, *PixMapWidR, *PixMapWidQ; - // GdkBitmap *mask; - GtkWidget *FileMenu, *OpenItem, *QuitItem, *FileItem; - GtkWidget *ViewMenu, *ExtMemItem, *IntMemItem, *ViewItem; - // GtkWidget *ViewMenu, *ExtMemItem, *IntMemItem, *PgmMemItem, *ViewItem; - GtkWidget *HelpMenu, *AboutItem, *LicenseItem, *HelpItem; - GtkWidget *MenuBar; - - // RESET button - GdkBitmap *RESET_mask; - GdkPixmap *RESET_pixmap; - GtkWidget *RESET_widget; - GtkWidget *ButtonReset; - - // RUN button - GdkBitmap *RUN_mask; - GdkPixmap *RUN_pixmap; - GtkWidget *RUN_widget; - GtkWidget *ButtonRun; - - // STOP button - GdkBitmap *STOP_mask; - GdkPixmap *STOP_pixmap; - GtkWidget *STOP_widget; - GtkWidget *ButtonStop; - - // STEP button - GdkBitmap *STEP_mask; - GdkPixmap *STEP_pixmap; - GtkWidget *STEP_widget; - GtkWidget *ButtonStep; -}; - -void EmuGtkSignalStub3( GtkWidget *widget, GdkEvent *event, gpointer data ); -void EmuGtkSignalStub2( GtkWidget *widget, gpointer data ); -void FileOpenDialog_OK( GtkButton *button, gpointer data ); -void FileOpenDialog_CANCEL( GtkButton *button, gpointer data ); - -gint RunningFunction( ); - - -#endif diff --git a/src/Inst_Def.hpp b/src/Inst_Def.hpp deleted file mode 100644 index 2ef66da..0000000 --- a/src/Inst_Def.hpp +++ /dev/null @@ -1,266 +0,0 @@ -#ifndef __INST_DEF_HPP_ -#define __INST_DEF_HPP_ -// Do not modify this file directly, it was created by Opcode2cpp.pl -// Any modification made directly on this file will be lost - - -int OP_00( ); -int OP_01( ); -int OP_02( ); -int OP_03( ); -int OP_04( ); -int OP_05( ); -int OP_06( ); -int OP_07( ); -int OP_08( ); -int OP_09( ); -int OP_0A( ); -int OP_0B( ); -int OP_0C( ); -int OP_0D( ); -int OP_0E( ); -int OP_0F( ); -int OP_10( ); -int OP_11( ); -int OP_12( ); -int OP_13( ); -int OP_14( ); -int OP_15( ); -int OP_16( ); -int OP_17( ); -int OP_18( ); -int OP_19( ); -int OP_1A( ); -int OP_1B( ); -int OP_1C( ); -int OP_1D( ); -int OP_1E( ); -int OP_1F( ); -int OP_20( ); -int OP_21( ); -int OP_22( ); -int OP_23( ); -int OP_24( ); -int OP_25( ); -int OP_26( ); -int OP_27( ); -int OP_28( ); -int OP_29( ); -int OP_2A( ); -int OP_2B( ); -int OP_2C( ); -int OP_2D( ); -int OP_2E( ); -int OP_2F( ); -int OP_30( ); -int OP_31( ); -int OP_32( ); -int OP_33( ); -int OP_34( ); -int OP_35( ); -int OP_36( ); -int OP_37( ); -int OP_38( ); -int OP_39( ); -int OP_3A( ); -int OP_3B( ); -int OP_3C( ); -int OP_3D( ); -int OP_3E( ); -int OP_3F( ); -int OP_40( ); -int OP_41( ); -int OP_42( ); -int OP_43( ); -int OP_44( ); -int OP_45( ); -int OP_46( ); -int OP_47( ); -int OP_48( ); -int OP_49( ); -int OP_4A( ); -int OP_4B( ); -int OP_4C( ); -int OP_4D( ); -int OP_4E( ); -int OP_4F( ); -int OP_50( ); -int OP_51( ); -int OP_52( ); -int OP_53( ); -int OP_54( ); -int OP_55( ); -int OP_56( ); -int OP_57( ); -int OP_58( ); -int OP_59( ); -int OP_5A( ); -int OP_5B( ); -int OP_5C( ); -int OP_5D( ); -int OP_5E( ); -int OP_5F( ); -int OP_60( ); -int OP_61( ); -int OP_62( ); -int OP_63( ); -int OP_64( ); -int OP_65( ); -int OP_66( ); -int OP_67( ); -int OP_68( ); -int OP_69( ); -int OP_6A( ); -int OP_6B( ); -int OP_6C( ); -int OP_6D( ); -int OP_6E( ); -int OP_6F( ); -int OP_70( ); -int OP_71( ); -int OP_72( ); -int OP_73( ); -int OP_74( ); -int OP_75( ); -int OP_76( ); -int OP_77( ); -int OP_78( ); -int OP_79( ); -int OP_7A( ); -int OP_7B( ); -int OP_7C( ); -int OP_7D( ); -int OP_7E( ); -int OP_7F( ); -int OP_80( ); -int OP_81( ); -int OP_82( ); -int OP_83( ); -int OP_84( ); -int OP_85( ); -int OP_86( ); -int OP_87( ); -int OP_88( ); -int OP_89( ); -int OP_8A( ); -int OP_8B( ); -int OP_8C( ); -int OP_8D( ); -int OP_8E( ); -int OP_8F( ); -int OP_90( ); -int OP_91( ); -int OP_92( ); -int OP_93( ); -int OP_94( ); -int OP_95( ); -int OP_96( ); -int OP_97( ); -int OP_98( ); -int OP_99( ); -int OP_9A( ); -int OP_9B( ); -int OP_9C( ); -int OP_9D( ); -int OP_9E( ); -int OP_9F( ); -int OP_A0( ); -int OP_A1( ); -int OP_A2( ); -int OP_A3( ); -int OP_A4( ); -int OP_A5( ); -int OP_A6( ); -int OP_A7( ); -int OP_A8( ); -int OP_A9( ); -int OP_AA( ); -int OP_AB( ); -int OP_AC( ); -int OP_AD( ); -int OP_AE( ); -int OP_AF( ); -int OP_B0( ); -int OP_B1( ); -int OP_B2( ); -int OP_B3( ); -int OP_B4( ); -int OP_B5( ); -int OP_B6( ); -int OP_B7( ); -int OP_B8( ); -int OP_B9( ); -int OP_BA( ); -int OP_BB( ); -int OP_BC( ); -int OP_BD( ); -int OP_BE( ); -int OP_BF( ); -int OP_C0( ); -int OP_C1( ); -int OP_C2( ); -int OP_C3( ); -int OP_C4( ); -int OP_C5( ); -int OP_C6( ); -int OP_C7( ); -int OP_C8( ); -int OP_C9( ); -int OP_CA( ); -int OP_CB( ); -int OP_CC( ); -int OP_CD( ); -int OP_CE( ); -int OP_CF( ); -int OP_D0( ); -int OP_D1( ); -int OP_D2( ); -int OP_D3( ); -int OP_D4( ); -int OP_D5( ); -int OP_D6( ); -int OP_D7( ); -int OP_D8( ); -int OP_D9( ); -int OP_DA( ); -int OP_DB( ); -int OP_DC( ); -int OP_DD( ); -int OP_DE( ); -int OP_DF( ); -int OP_E0( ); -int OP_E1( ); -int OP_E2( ); -int OP_E3( ); -int OP_E4( ); -int OP_E5( ); -int OP_E6( ); -int OP_E7( ); -int OP_E8( ); -int OP_E9( ); -int OP_EA( ); -int OP_EB( ); -int OP_EC( ); -int OP_ED( ); -int OP_EE( ); -int OP_EF( ); -int OP_F0( ); -int OP_F1( ); -int OP_F2( ); -int OP_F3( ); -int OP_F4( ); -int OP_F5( ); -int OP_F6( ); -int OP_F7( ); -int OP_F8( ); -int OP_F9( ); -int OP_FA( ); -int OP_FB( ); -int OP_FC( ); -int OP_FD( ); -int OP_FE( ); -int OP_FF( ); -void InitFuncPtr( ); - - -#endif diff --git a/src/Inst_Imp.cpp b/src/Inst_Imp.cpp deleted file mode 100644 index b8998ab..0000000 --- a/src/Inst_Imp.cpp +++ /dev/null @@ -1,4208 +0,0 @@ -#ifndef __INST_IMP_HPP_ -#define __INST_IMP_HPP_ - -//#include "CPU8051.hpp" - -// Do not modify this file directly, it was created by Opcode2cpp.pl -// Any modification made directly on this file will be lost - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_00( ) -// Instruction "NOP" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_00( ) -{ -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_01( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_01( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_02( ) -// Instruction "LJMP addr16" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_02( ) -{ -unsigned int addr16 = ( PGMMem->Read8( PC++ ) << 8 ); -addr16 += PGMMem->Read8( PC++ ); -PC = addr16; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_03( ) -// Instruction "RR A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_03( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination = ( destination >> 1 ) | ( destination << 7 ); -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_04( ) -// Instruction "INC A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_04( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination++; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_05( ) -// Instruction "INC direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_05( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -destination++; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_06( ) -// Instruction "INC @R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_06( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination++; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_07( ) -// Instruction "INC @R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_07( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination++; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_08( ) -// Instruction "INC R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_08( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -destination++; -WriteD( BANKPSW + _R0_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_09( ) -// Instruction "INC R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_09( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -destination++; -WriteD( BANKPSW + _R1_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0A( ) -// Instruction "INC R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0A( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -destination++; -WriteD( BANKPSW + _R2_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0B( ) -// Instruction "INC R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0B( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -destination++; -WriteD( BANKPSW + _R3_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0C( ) -// Instruction "INC R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0C( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -destination++; -WriteD( BANKPSW + _R4_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0D( ) -// Instruction "INC R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0D( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -destination++; -WriteD( BANKPSW + _R5_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0E( ) -// Instruction "INC R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0E( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -destination++; -WriteD( BANKPSW + _R6_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_0F( ) -// Instruction "INC R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_0F( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -destination++; -WriteD( BANKPSW + _R7_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_10( ) -// Instruction "JBC bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_10( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( destination == 1 ) { PC = source; destination = 0; } -WriteB( dstbitaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_11( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_11( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_12( ) -// Instruction "LCALL addr16" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_12( ) -{ -unsigned int addr16 = ( PGMMem->Read8( PC++ ) << 8 ); -addr16 += PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = addr16; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_13( ) -// Instruction "RRC A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_13( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char tmpval = destination; -destination = ( destination >> 1 ) | ( ReadD( _PSW_ ) & 0x80 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) | ( tmpval << 7 ) ); -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_14( ) -// Instruction "DEC A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_14( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination--; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_15( ) -// Instruction "DEC direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_15( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -destination--; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_16( ) -// Instruction "DEC @R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_16( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination--; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_17( ) -// Instruction "DEC @R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_17( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination--; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_18( ) -// Instruction "DEC R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_18( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -destination--; -WriteD( BANKPSW + _R0_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_19( ) -// Instruction "DEC R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_19( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -destination--; -WriteD( BANKPSW + _R1_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1A( ) -// Instruction "DEC R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1A( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -destination--; -WriteD( BANKPSW + _R2_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1B( ) -// Instruction "DEC R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1B( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -destination--; -WriteD( BANKPSW + _R3_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1C( ) -// Instruction "DEC R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1C( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -destination--; -WriteD( BANKPSW + _R4_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1D( ) -// Instruction "DEC R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1D( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -destination--; -WriteD( BANKPSW + _R5_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1E( ) -// Instruction "DEC R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1E( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -destination--; -WriteD( BANKPSW + _R6_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_1F( ) -// Instruction "DEC R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_1F( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -destination--; -WriteD( BANKPSW + _R7_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_20( ) -// Instruction "JB bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_20( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( destination == 1 ) { PC = source; } -WriteB( dstbitaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_21( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_21( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_22( ) -// Instruction "RET" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_22( ) -{ -unsigned char SP = ReadD( _SP_ ); -PC = ( ReadI( SP-- ) << 8 ); -PC += ReadI ( SP-- ); -WriteD( _SP_, SP ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_23( ) -// Instruction "RL A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_23( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination = ( destination << 1 ) | ( destination >> 7 ); -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_24( ) -// Instruction "ADD A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_24( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_25( ) -// Instruction "ADD A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_25( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_26( ) -// Instruction "ADD A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_26( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_27( ) -// Instruction "ADD A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_27( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_28( ) -// Instruction "ADD A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_28( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_29( ) -// Instruction "ADD A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_29( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2A( ) -// Instruction "ADD A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2B( ) -// Instruction "ADD A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2C( ) -// Instruction "ADD A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2D( ) -// Instruction "ADD A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2E( ) -// Instruction "ADD A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_2F( ) -// Instruction "ADD A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_2F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_30( ) -// Instruction "JNB bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_30( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( destination == 0 ) { PC = source; } -WriteB( dstbitaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_31( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_31( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_32( ) -// Instruction "RETI" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_32( ) -{ -ActivePriority = -1; -unsigned char SP = ReadD( _SP_ ); -PC = ( ReadI( SP-- ) << 8 ); -PC += ReadI( SP-- ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_33( ) -// Instruction "RLC A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_33( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char tmpval = destination; -destination = ( destination << 1 ) | ( ( ReadD( _PSW_ ) & 0x80 ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) | ( tmpval & 0x80 ) ); -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_34( ) -// Instruction "ADDC A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_34( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_35( ) -// Instruction "ADDC A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_35( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_36( ) -// Instruction "ADDC A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_36( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_37( ) -// Instruction "ADDC A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_37( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_38( ) -// Instruction "ADDC A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_38( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_39( ) -// Instruction "ADDC A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_39( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3A( ) -// Instruction "ADDC A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3B( ) -// Instruction "ADDC A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3C( ) -// Instruction "ADDC A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3D( ) -// Instruction "ADDC A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3E( ) -// Instruction "ADDC A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_3F( ) -// Instruction "ADDC A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_3F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination + source + carryflag > 0xFF ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination += source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_40( ) -// Instruction "JC reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_40( ) -{ -PC++; -unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( ReadD( _PSW_ ) > 0x7F) { PC = destination; } -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_41( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_41( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_42( ) -// Instruction "ORL direct,A" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_42( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( _ACC_ ); -destination |= source; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_43( ) -// Instruction "ORL direct,#data" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_43( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = PGMMem->Read8( PC++ ); -destination |= source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_44( ) -// Instruction "ORL A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_44( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_45( ) -// Instruction "ORL A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_45( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_46( ) -// Instruction "ORL A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_46( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_47( ) -// Instruction "ORL A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_47( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_48( ) -// Instruction "ORL A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_48( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_49( ) -// Instruction "ORL A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_49( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4A( ) -// Instruction "ORL A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4B( ) -// Instruction "ORL A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4C( ) -// Instruction "ORL A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4D( ) -// Instruction "ORL A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4E( ) -// Instruction "ORL A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_4F( ) -// Instruction "ORL A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_4F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -destination |= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_50( ) -// Instruction "JNC reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_50( ) -{ -PC++; -unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( ReadD( _PSW_ ) < 0x80 ) { PC = destination; } -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_51( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_51( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_52( ) -// Instruction "ANL direct,A" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_52( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( _ACC_ ); -destination &= source; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_53( ) -// Instruction "ANL direct,#data" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_53( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = PGMMem->Read8( PC++ ); -destination &= source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_54( ) -// Instruction "ANL A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_54( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_55( ) -// Instruction "ANL A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_55( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_56( ) -// Instruction "ANL A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_56( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_57( ) -// Instruction "ANL A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_57( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_58( ) -// Instruction "ANL A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_58( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_59( ) -// Instruction "ANL A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_59( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5A( ) -// Instruction "ANL A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5B( ) -// Instruction "ANL A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5C( ) -// Instruction "ANL A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5D( ) -// Instruction "ANL A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5E( ) -// Instruction "ANL A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_5F( ) -// Instruction "ANL A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_5F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -destination &= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_60( ) -// Instruction "JZ reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_60( ) -{ -PC++; -unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( ReadD( _ACC_ ) == 0 ) { PC = destination; } -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_61( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_61( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_62( ) -// Instruction "XRL direct,A" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_62( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( _ACC_ ); -destination ^= source; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_63( ) -// Instruction "XRL direct,#data" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_63( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = PGMMem->Read8( PC++ ); -destination ^= source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_64( ) -// Instruction "XRL A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_64( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_65( ) -// Instruction "XRL A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_65( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_66( ) -// Instruction "XRL A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_66( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_67( ) -// Instruction "XRL A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_67( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_68( ) -// Instruction "XRL A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_68( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_69( ) -// Instruction "XRL A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_69( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6A( ) -// Instruction "XRL A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6B( ) -// Instruction "XRL A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6C( ) -// Instruction "XRL A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6D( ) -// Instruction "XRL A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6E( ) -// Instruction "XRL A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_6F( ) -// Instruction "XRL A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_6F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -destination ^= source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_70( ) -// Instruction "JNZ reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_70( ) -{ -PC++; -unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -if ( ReadD( _ACC_ ) != 0 ) { PC = destination; } -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_71( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_71( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_72( ) -// Instruction "ORL C,bitaddr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_72( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -unsigned char source, srcbitaddr = PGMMem->Read8( PC++ ); -source = ReadB( srcbitaddr ); -WriteD( _PSW_ , ( ( destination | source ) << 7 ) ); -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_73( ) -// Instruction "JMP @A+DPTR" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_73( ) -{ -unsigned int destination = ReadI( ReadD( _ACC_ ) + ReadD( _DPTRLOW_ ) + ( ReadD( _DPTRHIGH_ ) << 8 ) ); -PC = destination; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_74( ) -// Instruction "MOV A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_74( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_75( ) -// Instruction "MOV direct,#data" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_75( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_76( ) -// Instruction "MOV @R0,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_76( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_77( ) -// Instruction "MOV @R1,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_77( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_78( ) -// Instruction "MOV R0,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_78( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R0_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_79( ) -// Instruction "MOV R1,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_79( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R1_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7A( ) -// Instruction "MOV R2,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7A( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R2_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7B( ) -// Instruction "MOV R3,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7B( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R3_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7C( ) -// Instruction "MOV R4,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7C( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R4_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7D( ) -// Instruction "MOV R5,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7D( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R5_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7E( ) -// Instruction "MOV R6,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7E( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R6_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_7F( ) -// Instruction "MOV R7,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_7F( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -unsigned char source = PGMMem->Read8( PC++ ); -destination = source; -WriteD( BANKPSW + _R7_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_80( ) -// Instruction "SJMP reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_80( ) -{ -PC++; -unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -PC = destination; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_81( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_81( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_82( ) -// Instruction "ANL C,bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_82( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -unsigned char source, srcbitaddr = PGMMem->Read8( PC++ ); -source = ReadB( srcbitaddr ); -WriteD( _PSW_, ( ( destination & source) << 7 ) ); -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_83( ) -// Instruction "MOVC A,@A+PC" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_83( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( ReadD( _ACC_ ) + ( ++PC ) ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_84( ) -// Instruction "DIV AB" takes 4 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_84( ) -{ -unsigned char A = ReadD( _ACC_ ), B = ReadD( _B_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7B ) ); -if ( B != 0 ) { -WriteD( _ACC_, A/B ); WriteD( _B_, A%B ); -} else WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -return 4; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_85( ) -// Instruction "MOV direct,direct" takes 1 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_85( ) -{ -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -destination = source; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_86( ) -// Instruction "MOV direct,@R0" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_86( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_87( ) -// Instruction "MOV direct,@R1" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_87( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_88( ) -// Instruction "MOV direct,R0" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_88( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_89( ) -// Instruction "MOV direct,R1" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_89( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8A( ) -// Instruction "MOV direct,R2" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8A( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8B( ) -// Instruction "MOV direct,R3" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8B( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8C( ) -// Instruction "MOV direct,R4" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8C( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8D( ) -// Instruction "MOV direct,R5" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8D( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8E( ) -// Instruction "MOV direct,R6" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8E( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_8F( ) -// Instruction "MOV direct,R7" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_8F( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -destination = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_90( ) -// Instruction "MOV DPTR,#data16" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_90( ) -{ -unsigned int destination = ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ ); -unsigned char source = ( PGMMem->Read8( PC++ ) << 8 ); -source += PGMMem->Read8( PC++ ); -destination = source; -WriteD( _DPTRHIGH_, ( destination >> 8 ) ); -WriteD( _DPTRLOW_, ( destination & 0xFF ) ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_91( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_91( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_92( ) -// Instruction "MOV bitaddr,C" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_92( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -unsigned char source = ( ReadD( _PSW_ ) >> 7 ); -destination = source; -WriteB( dstbitaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_93( ) -// Instruction "MOVC A,@A+DPTR" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_93( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( ReadD( _ACC_ ) + ReadD( _DPTRLOW_ ) + ( ReadD( _DPTRHIGH_ ) << 8 ) ); -destination = source; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_94( ) -// Instruction "SUBB A,#data" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_94( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_95( ) -// Instruction "SUBB A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_95( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_96( ) -// Instruction "SUBB A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_96( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_97( ) -// Instruction "SUBB A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_97( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_98( ) -// Instruction "SUBB A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_98( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_99( ) -// Instruction "SUBB A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_99( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9A( ) -// Instruction "SUBB A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9A( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9B( ) -// Instruction "SUBB A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9B( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9C( ) -// Instruction "SUBB A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9C( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9D( ) -// Instruction "SUBB A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9D( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9E( ) -// Instruction "SUBB A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9E( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_9F( ) -// Instruction "SUBB A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_9F( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -unsigned char carryflag = ReadD( _PSW_ ) >> 7; -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) ); -if ( destination < ( source + carryflag ) ) { - WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) ); -destination -= source + carryflag; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A0( ) -// Instruction "ORL C,/bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A0( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -unsigned char source, srcbitaddr = PGMMem->Read8( PC++ ); -source = ( ReadB( srcbitaddr ) ^ 1 ); -WriteD( _PSW_ , ( ( destination | source ) << 7 ) ); -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A1( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A2( ) -// Instruction "MOV C,bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A2( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -unsigned char source, srcbitaddr = PGMMem->Read8( PC++ ); -source = ReadB( srcbitaddr ); -destination = source; -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A3( ) -// Instruction "INC DPTR" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A3( ) -{ -unsigned int destination = ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ ); -destination++; -WriteD( _DPTRHIGH_, ( destination >> 8 ) ); -WriteD( _DPTRLOW_, ( destination & 0xFF ) ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A4( ) -// Instruction "MUL AB" takes 4 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A4( ) -{ -unsigned char A = ReadD( _ACC_ ), B = ReadD( _B_ ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7B ) ); -WriteD( _ACC_ , ( ( A * B ) & 0x00FF ) ); WriteD( _B_, ( A * B ) / 0x100 ); -if ( ReadD( _B_ ) > 0) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) ); -return 4; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A5( ) -// Instruction "INVALID" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A5( ) -{ -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A6( ) -// Instruction "MOV @R0,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A6( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A7( ) -// Instruction "MOV @R1,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A7( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A8( ) -// Instruction "MOV R0,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A8( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R0_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_A9( ) -// Instruction "MOV R1,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_A9( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R1_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AA( ) -// Instruction "MOV R2,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AA( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R2_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AB( ) -// Instruction "MOV R3,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AB( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R3_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AC( ) -// Instruction "MOV R4,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AC( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R4_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AD( ) -// Instruction "MOV R5,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AD( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R5_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AE( ) -// Instruction "MOV R6,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AE( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R6_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_AF( ) -// Instruction "MOV R7,direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_AF( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( BANKPSW + _R7_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B0( ) -// Instruction "ANL C,/bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B0( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -unsigned char source, srcbitaddr = PGMMem->Read8( PC++ ); -source = ( ReadB( srcbitaddr ) ^ 1 ); -WriteD( _PSW_, ( ( destination & source) << 7 ) ); -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B1( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B2( ) -// Instruction "CPL bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B2( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -destination ^= 0x01; -WriteB( dstbitaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B3( ) -// Instruction "CPL C" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B3( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -destination ^= 0x01; -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B4( ) -// Instruction "CJNE A,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B4( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B5( ) -// Instruction "CJNE A,direct,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B5( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B6( ) -// Instruction "CJNE @R0,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B6( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B7( ) -// Instruction "CJNE @R1,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B7( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B8( ) -// Instruction "CJNE R0,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B8( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R0_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_B9( ) -// Instruction "CJNE R1,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_B9( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R1_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BA( ) -// Instruction "CJNE R2,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BA( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R2_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BB( ) -// Instruction "CJNE R3,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BB( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R3_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BC( ) -// Instruction "CJNE R4,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BC( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R4_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BD( ) -// Instruction "CJNE R5,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BD( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R5_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BE( ) -// Instruction "CJNE R6,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BE( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R6_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_BF( ) -// Instruction "CJNE R7,#data,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_BF( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -unsigned char source = PGMMem->Read8( PC++ ); -unsigned int reladdr = ( ( PGMMem->Read8( PC++ ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 ); -WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) ); -if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); -if ( destination != source ) PC = reladdr; -WriteD( BANKPSW + _R7_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C0( ) -// Instruction "PUSH direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C0( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, destination ); -WriteD( _SP_, SP ); -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C1( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C2( ) -// Instruction "CLR bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C2( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -destination = 0; -WriteB( dstbitaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C3( ) -// Instruction "CLR C" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C3( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -destination = 0; -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C4( ) -// Instruction "SWAP A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C4( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination = ( destination << 4 ) + ( destination >> 4 ); -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C5( ) -// Instruction "XCH A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C5( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( srcaddr, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C6( ) -// Instruction "XCH A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C6( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteI( ReadD( BANKPSW + _R0_ ), source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C7( ) -// Instruction "XCH A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C7( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteI( ReadD( BANKPSW + _R1_ ), source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C8( ) -// Instruction "XCH A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C8( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R0_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_C9( ) -// Instruction "XCH A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_C9( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R1_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CA( ) -// Instruction "XCH A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CA( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R2_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CB( ) -// Instruction "XCH A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CB( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R3_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CC( ) -// Instruction "XCH A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CC( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R4_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CD( ) -// Instruction "XCH A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CD( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R5_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CE( ) -// Instruction "XCH A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CE( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R6_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_CF( ) -// Instruction "XCH A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_CF( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -unsigned char tmpval = destination; -destination = source; source = tmpval; -WriteD( _ACC_, destination ); -WriteD( BANKPSW + _R7_, source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D0( ) -// Instruction "POP direct" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D0( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char SP = ReadD( _SP_ ); -destination = ReadI( SP-- ); -WriteD( _SP_, SP ); -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D1( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D2( ) -// Instruction "SETB bitaddr" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D2( ) -{ -unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ ); -destination = ReadB( dstbitaddr ); -destination = 1; -WriteB( dstbitaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D3( ) -// Instruction "SETB C" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D3( ) -{ -unsigned char destination = ( ReadD( _PSW_ ) >> 7 ); -destination = 1; -WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D4( ) -// Instruction "DA A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D4( ) -{ -unsigned char destination = ReadD( _ACC_ ); -if ( ( ( destination & 0x0F ) > 9) || ( ReadD( _PSW_ ) | 0x40)) { - if ( ( destination + 6 ) > 0xFF) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - destination += 6; -} -if ( ( ReadD( _PSW_ ) & 0x80) || ( ( destination & 0xF0 ) > 0x90 ) ) { - if ( ( destination + 0x60 ) > 0xFF ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) ); - destination += 0x60; -} -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D5( ) -// Instruction "DJNZ direct,reladdr" takes 2 cycle(s) and 3 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D5( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( destaddr, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D6( ) -// Instruction "XCHD A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D6( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char tmpval = ( destination & 0x0F ); -destination = ( destination & 0xF0 ) + ( source & 0x0F ); -source = ( source & 0xF0 ) + tmpval; -WriteD( _ACC_, destination ); -WriteI( ReadD( BANKPSW + _R0_ ), source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D7( ) -// Instruction "XCHD A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D7( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char tmpval = ( destination & 0x0F ); -destination = ( destination & 0xF0 ) + ( source & 0x0F ); -source = ( source & 0xF0 ) + tmpval; -WriteD( _ACC_, destination ); -WriteI( ReadD( BANKPSW + _R1_ ), source ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D8( ) -// Instruction "DJNZ R0,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D8( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R0_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_D9( ) -// Instruction "DJNZ R1,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_D9( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R1_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DA( ) -// Instruction "DJNZ R2,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DA( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R2_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DB( ) -// Instruction "DJNZ R3,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DB( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R3_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DC( ) -// Instruction "DJNZ R4,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DC( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R4_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DD( ) -// Instruction "DJNZ R5,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DD( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R5_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DE( ) -// Instruction "DJNZ R6,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DE( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R6_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_DF( ) -// Instruction "DJNZ R7,reladdr" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_DF( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -PC++; -unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 ); -destination--; -if ( destination != 0 ) PC = source; -WriteD( BANKPSW + _R7_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E0( ) -// Instruction "MOVX A,@DPTR" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E0( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_) ); -destination = source; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E1( ) -// Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E2( ) -// Instruction "MOVX A,@R0" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E2( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination = source; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E3( ) -// Instruction "MOVX A,@R1" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E3( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination = source; -WriteD( _ACC_, destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E4( ) -// Instruction "CLR A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E4( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination = 0; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E5( ) -// Instruction "MOV A,direct" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E5( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char srcaddr = PGMMem->Read8( PC++ ); -unsigned char source = ReadD( srcaddr ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E6( ) -// Instruction "MOV A,@R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E6( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E7( ) -// Instruction "MOV A,@R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E7( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E8( ) -// Instruction "MOV A,R0" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E8( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R0_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_E9( ) -// Instruction "MOV A,R1" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_E9( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R1_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_EA( ) -// Instruction "MOV A,R2" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_EA( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R2_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_EB( ) -// Instruction "MOV A,R3" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_EB( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R3_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_EC( ) -// Instruction "MOV A,R4" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_EC( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R4_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_ED( ) -// Instruction "MOV A,R5" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_ED( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R5_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_EE( ) -// Instruction "MOV A,R6" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_EE( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R6_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_EF( ) -// Instruction "MOV A,R7" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_EF( ) -{ -unsigned char destination = ReadD( _ACC_ ); -unsigned char source = ReadD( BANKPSW + _R7_ ); -destination = source; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F0( ) -// Instruction "MOVX @DPTR,A" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F0( ) -{ -unsigned char destination = ReadI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_) ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F1( ) -// Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F1( ) -{ -unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ ); -unsigned char SP = ReadD( _SP_ ); -WriteI( ++SP, ( PC & 0x00FF ) ); -WriteI( ++SP, ( PC >> 8 ) ); -WriteD( _SP_, SP ); -PC = ( PC & 0xF800 ) | addr11; -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F2( ) -// Instruction "MOVX @R0,A" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F2( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F3( ) -// Instruction "MOVX @R1,A" takes 2 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F3( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 2; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F4( ) -// Instruction "CPL A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F4( ) -{ -unsigned char destination = ReadD( _ACC_ ); -destination ^= 0xFF; -WriteD( _ACC_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F5( ) -// Instruction "MOV direct,A" takes 1 cycle(s) and 2 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F5( ) -{ -unsigned char destaddr = PGMMem->Read8( PC++ ); -unsigned char destination = ReadD( destaddr ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( destaddr, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F6( ) -// Instruction "MOV @R0,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F6( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteI( ReadD( BANKPSW + _R0_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F7( ) -// Instruction "MOV @R1,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F7( ) -{ -unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteI( ReadD( BANKPSW + _R1_ ), destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F8( ) -// Instruction "MOV R0,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F8( ) -{ -unsigned char destination = ReadD( BANKPSW + _R0_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R0_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_F9( ) -// Instruction "MOV R1,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_F9( ) -{ -unsigned char destination = ReadD( BANKPSW + _R1_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R1_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FA( ) -// Instruction "MOV R2,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FA( ) -{ -unsigned char destination = ReadD( BANKPSW + _R2_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R2_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FB( ) -// Instruction "MOV R3,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FB( ) -{ -unsigned char destination = ReadD( BANKPSW + _R3_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R3_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FC( ) -// Instruction "MOV R4,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FC( ) -{ -unsigned char destination = ReadD( BANKPSW + _R4_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R4_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FD( ) -// Instruction "MOV R5,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FD( ) -{ -unsigned char destination = ReadD( BANKPSW + _R5_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R5_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FE( ) -// Instruction "MOV R6,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FE( ) -{ -unsigned char destination = ReadD( BANKPSW + _R6_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R6_, destination ); -return 1; -} - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::OP_FF( ) -// Instruction "MOV R7,A" takes 1 cycle(s) and 1 byte(s) -////////////////////////////////////////////////////////////////////////////// -int CPU8051::OP_FF( ) -{ -unsigned char destination = ReadD( BANKPSW + _R7_ ); -unsigned char source = ReadD( _ACC_ ); -destination = source; -WriteD( BANKPSW + _R7_, destination ); -return 1; -} - - - - -////////////////////////////////////////////////////////////////////////////// -// void CPU8051::InitFuncPtr( ) -// Initialize Functions Pointers -////////////////////////////////////////////////////////////////////////////// -void CPU8051::InitFuncPtr( ) -{ - funcptr[0]=&CPU8051::OP_00; - funcptr[1]=&CPU8051::OP_01; - funcptr[2]=&CPU8051::OP_02; - funcptr[3]=&CPU8051::OP_03; - funcptr[4]=&CPU8051::OP_04; - funcptr[5]=&CPU8051::OP_05; - funcptr[6]=&CPU8051::OP_06; - funcptr[7]=&CPU8051::OP_07; - funcptr[8]=&CPU8051::OP_08; - funcptr[9]=&CPU8051::OP_09; - funcptr[10]=&CPU8051::OP_0A; - funcptr[11]=&CPU8051::OP_0B; - funcptr[12]=&CPU8051::OP_0C; - funcptr[13]=&CPU8051::OP_0D; - funcptr[14]=&CPU8051::OP_0E; - funcptr[15]=&CPU8051::OP_0F; - funcptr[16]=&CPU8051::OP_10; - funcptr[17]=&CPU8051::OP_11; - funcptr[18]=&CPU8051::OP_12; - funcptr[19]=&CPU8051::OP_13; - funcptr[20]=&CPU8051::OP_14; - funcptr[21]=&CPU8051::OP_15; - funcptr[22]=&CPU8051::OP_16; - funcptr[23]=&CPU8051::OP_17; - funcptr[24]=&CPU8051::OP_18; - funcptr[25]=&CPU8051::OP_19; - funcptr[26]=&CPU8051::OP_1A; - funcptr[27]=&CPU8051::OP_1B; - funcptr[28]=&CPU8051::OP_1C; - funcptr[29]=&CPU8051::OP_1D; - funcptr[30]=&CPU8051::OP_1E; - funcptr[31]=&CPU8051::OP_1F; - funcptr[32]=&CPU8051::OP_20; - funcptr[33]=&CPU8051::OP_21; - funcptr[34]=&CPU8051::OP_22; - funcptr[35]=&CPU8051::OP_23; - funcptr[36]=&CPU8051::OP_24; - funcptr[37]=&CPU8051::OP_25; - funcptr[38]=&CPU8051::OP_26; - funcptr[39]=&CPU8051::OP_27; - funcptr[40]=&CPU8051::OP_28; - funcptr[41]=&CPU8051::OP_29; - funcptr[42]=&CPU8051::OP_2A; - funcptr[43]=&CPU8051::OP_2B; - funcptr[44]=&CPU8051::OP_2C; - funcptr[45]=&CPU8051::OP_2D; - funcptr[46]=&CPU8051::OP_2E; - funcptr[47]=&CPU8051::OP_2F; - funcptr[48]=&CPU8051::OP_30; - funcptr[49]=&CPU8051::OP_31; - funcptr[50]=&CPU8051::OP_32; - funcptr[51]=&CPU8051::OP_33; - funcptr[52]=&CPU8051::OP_34; - funcptr[53]=&CPU8051::OP_35; - funcptr[54]=&CPU8051::OP_36; - funcptr[55]=&CPU8051::OP_37; - funcptr[56]=&CPU8051::OP_38; - funcptr[57]=&CPU8051::OP_39; - funcptr[58]=&CPU8051::OP_3A; - funcptr[59]=&CPU8051::OP_3B; - funcptr[60]=&CPU8051::OP_3C; - funcptr[61]=&CPU8051::OP_3D; - funcptr[62]=&CPU8051::OP_3E; - funcptr[63]=&CPU8051::OP_3F; - funcptr[64]=&CPU8051::OP_40; - funcptr[65]=&CPU8051::OP_41; - funcptr[66]=&CPU8051::OP_42; - funcptr[67]=&CPU8051::OP_43; - funcptr[68]=&CPU8051::OP_44; - funcptr[69]=&CPU8051::OP_45; - funcptr[70]=&CPU8051::OP_46; - funcptr[71]=&CPU8051::OP_47; - funcptr[72]=&CPU8051::OP_48; - funcptr[73]=&CPU8051::OP_49; - funcptr[74]=&CPU8051::OP_4A; - funcptr[75]=&CPU8051::OP_4B; - funcptr[76]=&CPU8051::OP_4C; - funcptr[77]=&CPU8051::OP_4D; - funcptr[78]=&CPU8051::OP_4E; - funcptr[79]=&CPU8051::OP_4F; - funcptr[80]=&CPU8051::OP_50; - funcptr[81]=&CPU8051::OP_51; - funcptr[82]=&CPU8051::OP_52; - funcptr[83]=&CPU8051::OP_53; - funcptr[84]=&CPU8051::OP_54; - funcptr[85]=&CPU8051::OP_55; - funcptr[86]=&CPU8051::OP_56; - funcptr[87]=&CPU8051::OP_57; - funcptr[88]=&CPU8051::OP_58; - funcptr[89]=&CPU8051::OP_59; - funcptr[90]=&CPU8051::OP_5A; - funcptr[91]=&CPU8051::OP_5B; - funcptr[92]=&CPU8051::OP_5C; - funcptr[93]=&CPU8051::OP_5D; - funcptr[94]=&CPU8051::OP_5E; - funcptr[95]=&CPU8051::OP_5F; - funcptr[96]=&CPU8051::OP_60; - funcptr[97]=&CPU8051::OP_61; - funcptr[98]=&CPU8051::OP_62; - funcptr[99]=&CPU8051::OP_63; - funcptr[100]=&CPU8051::OP_64; - funcptr[101]=&CPU8051::OP_65; - funcptr[102]=&CPU8051::OP_66; - funcptr[103]=&CPU8051::OP_67; - funcptr[104]=&CPU8051::OP_68; - funcptr[105]=&CPU8051::OP_69; - funcptr[106]=&CPU8051::OP_6A; - funcptr[107]=&CPU8051::OP_6B; - funcptr[108]=&CPU8051::OP_6C; - funcptr[109]=&CPU8051::OP_6D; - funcptr[110]=&CPU8051::OP_6E; - funcptr[111]=&CPU8051::OP_6F; - funcptr[112]=&CPU8051::OP_70; - funcptr[113]=&CPU8051::OP_71; - funcptr[114]=&CPU8051::OP_72; - funcptr[115]=&CPU8051::OP_73; - funcptr[116]=&CPU8051::OP_74; - funcptr[117]=&CPU8051::OP_75; - funcptr[118]=&CPU8051::OP_76; - funcptr[119]=&CPU8051::OP_77; - funcptr[120]=&CPU8051::OP_78; - funcptr[121]=&CPU8051::OP_79; - funcptr[122]=&CPU8051::OP_7A; - funcptr[123]=&CPU8051::OP_7B; - funcptr[124]=&CPU8051::OP_7C; - funcptr[125]=&CPU8051::OP_7D; - funcptr[126]=&CPU8051::OP_7E; - funcptr[127]=&CPU8051::OP_7F; - funcptr[128]=&CPU8051::OP_80; - funcptr[129]=&CPU8051::OP_81; - funcptr[130]=&CPU8051::OP_82; - funcptr[131]=&CPU8051::OP_83; - funcptr[132]=&CPU8051::OP_84; - funcptr[133]=&CPU8051::OP_85; - funcptr[134]=&CPU8051::OP_86; - funcptr[135]=&CPU8051::OP_87; - funcptr[136]=&CPU8051::OP_88; - funcptr[137]=&CPU8051::OP_89; - funcptr[138]=&CPU8051::OP_8A; - funcptr[139]=&CPU8051::OP_8B; - funcptr[140]=&CPU8051::OP_8C; - funcptr[141]=&CPU8051::OP_8D; - funcptr[142]=&CPU8051::OP_8E; - funcptr[143]=&CPU8051::OP_8F; - funcptr[144]=&CPU8051::OP_90; - funcptr[145]=&CPU8051::OP_91; - funcptr[146]=&CPU8051::OP_92; - funcptr[147]=&CPU8051::OP_93; - funcptr[148]=&CPU8051::OP_94; - funcptr[149]=&CPU8051::OP_95; - funcptr[150]=&CPU8051::OP_96; - funcptr[151]=&CPU8051::OP_97; - funcptr[152]=&CPU8051::OP_98; - funcptr[153]=&CPU8051::OP_99; - funcptr[154]=&CPU8051::OP_9A; - funcptr[155]=&CPU8051::OP_9B; - funcptr[156]=&CPU8051::OP_9C; - funcptr[157]=&CPU8051::OP_9D; - funcptr[158]=&CPU8051::OP_9E; - funcptr[159]=&CPU8051::OP_9F; - funcptr[160]=&CPU8051::OP_A0; - funcptr[161]=&CPU8051::OP_A1; - funcptr[162]=&CPU8051::OP_A2; - funcptr[163]=&CPU8051::OP_A3; - funcptr[164]=&CPU8051::OP_A4; - funcptr[165]=&CPU8051::OP_A5; - funcptr[166]=&CPU8051::OP_A6; - funcptr[167]=&CPU8051::OP_A7; - funcptr[168]=&CPU8051::OP_A8; - funcptr[169]=&CPU8051::OP_A9; - funcptr[170]=&CPU8051::OP_AA; - funcptr[171]=&CPU8051::OP_AB; - funcptr[172]=&CPU8051::OP_AC; - funcptr[173]=&CPU8051::OP_AD; - funcptr[174]=&CPU8051::OP_AE; - funcptr[175]=&CPU8051::OP_AF; - funcptr[176]=&CPU8051::OP_B0; - funcptr[177]=&CPU8051::OP_B1; - funcptr[178]=&CPU8051::OP_B2; - funcptr[179]=&CPU8051::OP_B3; - funcptr[180]=&CPU8051::OP_B4; - funcptr[181]=&CPU8051::OP_B5; - funcptr[182]=&CPU8051::OP_B6; - funcptr[183]=&CPU8051::OP_B7; - funcptr[184]=&CPU8051::OP_B8; - funcptr[185]=&CPU8051::OP_B9; - funcptr[186]=&CPU8051::OP_BA; - funcptr[187]=&CPU8051::OP_BB; - funcptr[188]=&CPU8051::OP_BC; - funcptr[189]=&CPU8051::OP_BD; - funcptr[190]=&CPU8051::OP_BE; - funcptr[191]=&CPU8051::OP_BF; - funcptr[192]=&CPU8051::OP_C0; - funcptr[193]=&CPU8051::OP_C1; - funcptr[194]=&CPU8051::OP_C2; - funcptr[195]=&CPU8051::OP_C3; - funcptr[196]=&CPU8051::OP_C4; - funcptr[197]=&CPU8051::OP_C5; - funcptr[198]=&CPU8051::OP_C6; - funcptr[199]=&CPU8051::OP_C7; - funcptr[200]=&CPU8051::OP_C8; - funcptr[201]=&CPU8051::OP_C9; - funcptr[202]=&CPU8051::OP_CA; - funcptr[203]=&CPU8051::OP_CB; - funcptr[204]=&CPU8051::OP_CC; - funcptr[205]=&CPU8051::OP_CD; - funcptr[206]=&CPU8051::OP_CE; - funcptr[207]=&CPU8051::OP_CF; - funcptr[208]=&CPU8051::OP_D0; - funcptr[209]=&CPU8051::OP_D1; - funcptr[210]=&CPU8051::OP_D2; - funcptr[211]=&CPU8051::OP_D3; - funcptr[212]=&CPU8051::OP_D4; - funcptr[213]=&CPU8051::OP_D5; - funcptr[214]=&CPU8051::OP_D6; - funcptr[215]=&CPU8051::OP_D7; - funcptr[216]=&CPU8051::OP_D8; - funcptr[217]=&CPU8051::OP_D9; - funcptr[218]=&CPU8051::OP_DA; - funcptr[219]=&CPU8051::OP_DB; - funcptr[220]=&CPU8051::OP_DC; - funcptr[221]=&CPU8051::OP_DD; - funcptr[222]=&CPU8051::OP_DE; - funcptr[223]=&CPU8051::OP_DF; - funcptr[224]=&CPU8051::OP_E0; - funcptr[225]=&CPU8051::OP_E1; - funcptr[226]=&CPU8051::OP_E2; - funcptr[227]=&CPU8051::OP_E3; - funcptr[228]=&CPU8051::OP_E4; - funcptr[229]=&CPU8051::OP_E5; - funcptr[230]=&CPU8051::OP_E6; - funcptr[231]=&CPU8051::OP_E7; - funcptr[232]=&CPU8051::OP_E8; - funcptr[233]=&CPU8051::OP_E9; - funcptr[234]=&CPU8051::OP_EA; - funcptr[235]=&CPU8051::OP_EB; - funcptr[236]=&CPU8051::OP_EC; - funcptr[237]=&CPU8051::OP_ED; - funcptr[238]=&CPU8051::OP_EE; - funcptr[239]=&CPU8051::OP_EF; - funcptr[240]=&CPU8051::OP_F0; - funcptr[241]=&CPU8051::OP_F1; - funcptr[242]=&CPU8051::OP_F2; - funcptr[243]=&CPU8051::OP_F3; - funcptr[244]=&CPU8051::OP_F4; - funcptr[245]=&CPU8051::OP_F5; - funcptr[246]=&CPU8051::OP_F6; - funcptr[247]=&CPU8051::OP_F7; - funcptr[248]=&CPU8051::OP_F8; - funcptr[249]=&CPU8051::OP_F9; - funcptr[250]=&CPU8051::OP_FA; - funcptr[251]=&CPU8051::OP_FB; - funcptr[252]=&CPU8051::OP_FC; - funcptr[253]=&CPU8051::OP_FD; - funcptr[254]=&CPU8051::OP_FE; - funcptr[255]=&CPU8051::OP_FF; - -} - - -#endif diff --git a/src/Makefile.am b/src/Makefile.am index ede6e24..30bb820 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -2,19 +2,19 @@ INCLUDES = -I$(top_srcdir)/pixmaps -bin_PROGRAMS = emu8051 emu8051_console +bin_PROGRAMS = emu8051 +# emu8051_console -emu8051_SOURCES = EmuGtk.hpp EmuGtk.cpp CPU8051.hpp CPU8051.cpp Memory.hpp Memory.cpp \ - MemWin.hpp MemWin.cpp PgmWin.hpp PgmWin.cpp RegWin.hpp RegWin.cpp options.c \ - common.h file.c +emu8051_SOURCES = cpu8051.c emugtk.c memory.c memwin.c pgmwin.c regwin.c options.c file.c \ + instructions_8051.c -emu8051_console_SOURCES = EmuConsole.hpp EmuConsole.cpp CPU8051.hpp CPU8051.cpp Memory.hpp \ - Memory.cpp Keyboard.hpp options.c common.h file.c +#emu8051_console_SOURCES = EmuConsole.cpp cpu8051.c memory.c options.c file.c # These headers will be included in the distribution tarball, but will not be # installed by 'make install' -noinst_HEADERS = Inst_Def.hpp EmuConsole.hpp Keyboard.hpp Reg8051.hpp GtkSizes.hpp disasm.hpp \ - exceptions.hpp +noinst_HEADERS = instructions_8051.h EmuConsole.hpp Keyboard.hpp reg8051.h gtksizes.h \ + disasm.hpp +# exceptions.hpp CLEANFILES = *~ @@ -22,7 +22,7 @@ DISTCLEANFILES = .deps/*.P MAINTAINERCLEANFILES = Makefile.in -EXTRA_DIST = Opcode2cpp.pl opcodes.lst Inst_Imp.cpp +EXTRA_DIST = opcode2c.pl opcodes.lst instructions_8051.h # This rule is used to bypass the default rule which is generated by Automake, in order # to get rid of all the cluttered informations that are displayed by Make before @@ -33,6 +33,3 @@ EXTRA_DIST = Opcode2cpp.pl opcodes.lst Inst_Imp.cpp # gcc -DHAVE_CONFIG_H -I. -I. -I.. -c `test -f 'main.c' || echo './'`main.c .c.o: $(COMPILE) -c $< - -.cpp.o: - $(CXXCOMPILE) -c $< diff --git a/src/MemWin.hpp b/src/MemWin.hpp deleted file mode 100644 index 0a610d0..0000000 --- a/src/MemWin.hpp +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _MEMWIN_HPP_ -#define _MEMWIN_HPP_ - -#include -#include "CPU8051.hpp" - -////////////////////////////////////////////////////////////////////////////// -// MemWin -// Implements a memory Window in Gtk+ as an Object -////////////////////////////////////////////////////////////////////////////// -class MemWin { -public: - MemWin( GtkWidget *parentwin ); - ~MemWin( ); - - void DumpD( CPU8051 *mCPU, unsigned int Address ); - void DumpI( CPU8051 *mCPU, unsigned int Address ); - -private: - GtkWidget *memwin; - GtkWidget *memclist; - - -}; - - - - -#endif diff --git a/src/Memory.cpp b/src/Memory.cpp deleted file mode 100644 index 8570264..0000000 --- a/src/Memory.cpp +++ /dev/null @@ -1,51 +0,0 @@ -#include "Memory.hpp" - -////////////////////////////////////////////////////////////////////////////// -// Memory::Memory( unsigned long MemSize ) -// Memory object constructor -////////////////////////////////////////////////////////////////////////////// -Memory::Memory( unsigned long MemSize ) -{ - memsize = MemSize; - memarray = new unsigned char[memsize]; -} - -////////////////////////////////////////////////////////////////////////////// -// Memory::~Memory( ) -// Memory object destructor -////////////////////////////////////////////////////////////////////////////// -Memory::~Memory( ) -{ - delete[] memarray; - memarray = 0; - memsize = 0; -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned long Memory::GetSize( ) -// Get Memory size -////////////////////////////////////////////////////////////////////////////// -unsigned long Memory::GetSize( ) -{ - return memsize; -} - -////////////////////////////////////////////////////////////////////////////// -// void Memory::Write8( unsigned long Address, unsigned char Value ) -// Write 8-bit Value at Address into Memory -////////////////////////////////////////////////////////////////////////////// -void Memory::Write8( unsigned long Address, unsigned char Value ) -{ - if (Address >= memsize) return; - memarray[Address] = Value; -} - -////////////////////////////////////////////////////////////////////////////// -// unsigned char Memory::Read8( unsigned long Address ) -// Read 8-bit value at Address in Memory -////////////////////////////////////////////////////////////////////////////// -unsigned char Memory::Read8( unsigned long Address ) -{ - if (Address < memsize) { return memarray[Address]; } - return 0; -} diff --git a/src/Memory.hpp b/src/Memory.hpp deleted file mode 100644 index a4aaba8..0000000 --- a/src/Memory.hpp +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _MEMORY_HPP_ -#define _MEMORY_HPP_ - - -////////////////////////////////////////////////////////////////////////////// -// Memory -// Implements a Memory array to be used by the CPU8051 as an Object -////////////////////////////////////////////////////////////////////////////// -class Memory { -public: - Memory( unsigned long MemSize ); - ~Memory( ); - - unsigned long GetSize( ); - - void Write8( unsigned long Address, unsigned char Value ); - unsigned char Read8( unsigned long Address ); - - unsigned char *memarray; - unsigned long memsize; -}; - - -#endif diff --git a/src/Opcode2cpp.pl b/src/Opcode2cpp.pl deleted file mode 100755 index 66ab1c2..0000000 --- a/src/Opcode2cpp.pl +++ /dev/null @@ -1,785 +0,0 @@ -#!/usr/bin/perl - -open INST_DEF,">Inst_Def.hpp" or die "Erreur ouverture Inst_Def.hpp : $!\n"; -open INST_IMP,">Inst_Imp.cpp" or die "Erreur ouverture Inst_Imp.hpp : $!\n"; -open OPCODELST,"opcodes.lst" or die "Erreur ouverture opcodes.lst : $!\n"; -open DISASM_HPP,">disasm.hpp" or die "Erreur ouverture disasm.hpp : $!\n"; - -print INST_IMP "#ifndef __INST_IMP_HPP_\n"; -print INST_IMP "#define __INST_IMP_HPP_\n\n"; -print INST_IMP "// Do not modify this file directly, it was created by Opcode2cpp.pl\n"; -print INST_IMP "// Any modification made directly on this file will be lost\n\n\n"; - - -print INST_DEF "#ifndef __INST_DEF_HPP_\n"; -print INST_DEF "#define __INST_DEF_HPP_\n"; -print INST_DEF "// Do not modify this file directly, it was created by Opcode2cpp.pl\n"; -print INST_DEF "// Any modification made directly on this file will be lost\n\n\n"; - -print DISASM_HPP "#ifndef __DISASM_HPP_\n"; -print DISASM_HPP "#define __DISASM_HPP_\n"; -print DISASM_HPP "// Do not modify this file directly, it was created by Opcode2cpp.pl\n"; -print DISASM_HPP "// Any modification made directly on this file will be lost\n\n\n"; - -$nbinst=0; -$nbaddr=0; -$nbargs=0; -$instnumb=0; - -$ligne=; -$ligne=; -while($ligne=) { - chop $ligne; - if (length $ligne < 2) {next;} - @wordlist=split ' ',$ligne; - $nbword=@wordlist; - $instruction=$wordlist[2]; - for($i=3;$i<($nbword-2);$i++) {$instruction="$instruction $wordlist[$i]";} - - $a_instruction[$instnumb]=$instruction; - $a_bytes[$instnumb]=$wordlist[$nbword-2]; - $a_cycles[$instnumb]=$wordlist[$nbword-1]; - $a_opcodehex[$instnumb]=$wordlist[1]; - $a_opcodebin[$instnumb]=$wordlist[0]; - - - $instfunction[$instnumb]="CPU8051::OP_$wordlist[1]"; - - $instargs[$instnumb << 2]=$instargs[($instnumb << 2) + 1]=$instargs[($instnumb << 2) + 2]=$instargs[($instnumb << 2) + 3]=0; - if ($nbword > 5) { - @argslist=split /\,/,$wordlist[3]; - $argslistsize=@argslist; - $instargs[$instnumb << 2]=$argslistsize; - for ($i=0;$i<$argslistsize;$i++) { - if (not exists $argstypes{$argslist[$i]}) { - $argstypes[$nbargs]=$argslist[$i]; - $argstypes{$argslist[$i]}=$nbargs++; - } - $instargs[($instnumb << 2) + $i + 1]=$argstypes{$argslist[$i]}; - } - } - - if (not exists $insttext{$wordlist[2]}) { - $insttext[$nbinst]=$wordlist[2]; - $insttext{$wordlist[2]}=$nbinst++; - } - - $insttype[$instnumb]=$insttext{$wordlist[2]}; - - if ( not exists $addrmode{$wordlist[3]}) { - $addrmode[$nbaddr]=$wordlist[3]; - $addrmode{$wordlist[3]}=$nbaddr++; - } - - $nbbytes[$instnumb]=$wordlist[$nbword-2]; - - $instaddr[$instnumb]=$addrmode{$wordlist[3]}; - - $instnumb++; -} -# ------------------------------------------------------------------------------ -print DISASM_HPP "// For all 256 opcodes, the value in this table gives the instruction type\n"; -print DISASM_HPP "// ex.: MOV, INC, CLR, CPL,...\n"; -print DISASM_HPP "// To know what is the instruction type, use the number as an offset in the InstTextTbl[]\n"; -print DISASM_HPP "static int InstTypesTbl[] = {\n"; -for($i=0;$i<256;$i++) { - print DISASM_HPP " $insttype[$i]"; - ($i != 255) and print DISASM_HPP ","; - if (($i+1) % 16 == 0) { print DISASM_HPP "\n"; } -} -print DISASM_HPP "};\n"; -print DISASM_HPP "\n\n"; -# ------------------------------------------------------------------------------ -print DISASM_HPP "// Size(in bytes) of each instruction (offset in table is instruction opcode)\n"; -print DISASM_HPP "static int InstSizesTbl[] = {\n"; -for($i=0;$i<256;$i++) { - print DISASM_HPP " $nbbytes[$i]"; - ($i != 255) and print DISASM_HPP ","; - if (($i+1) % 16 == 0) { print DISASM_HPP "\n"; } -} -print DISASM_HPP "};\n"; -print DISASM_HPP "\n\n"; -# ------------------------------------------------------------------------------ -print DISASM_HPP "// List of instructions types referenced by InstTypesTbl[]\n"; -$nbelement=@insttext; -print DISASM_HPP "\#define InstTextTblLength $nbelement\n"; -$elementnb=0; -print DISASM_HPP "static char *InstTextTbl[] = {\n"; -foreach $instruc (@insttext) { - print DISASM_HPP " \"$instruc\""; - ($elementnb++ < $nbelement-1) and print DISASM_HPP ","; - print DISASM_HPP "\n"; -} -print DISASM_HPP "};\n"; -print DISASM_HPP "\n\n"; -# ------------------------------------------------------------------------------ -print DISASM_HPP "// Table describing all arguments types of an instruction\n"; -print DISASM_HPP "// The table is indexed InstArgTbl[ opcode * 4]\n"; -print DISASM_HPP "// InstArgTbl[opcode*4 + 1] gives the number of arguments the instruction has\n"; -print DISASM_HPP "// InstArgTbl[opcode*4 + i] for i=1,2 and 3 give the type of each argument\n"; -print DISASM_HPP "// for most instructions, the 3rd argument isn't used\n"; -print DISASM_HPP "// the argument type is referecing to ArgsTextTbl[]\n"; -print DISASM_HPP "\#define InstArgTblLength 256\n"; -print DISASM_HPP "static int InstArgTbl[] = {\n"; -for($i=0;$i<1024;$i++) { - print DISASM_HPP " $instargs[$i]"; - ($i != 1023) and print DISASM_HPP ","; - if (($i+1) % 16 == 0) { print DISASM_HPP "\n"; } -} -print DISASM_HPP "};\n"; -print DISASM_HPP "\n\n"; -# ------------------------------------------------------------------------------ -print DISASM_HPP "// List all types of arguments available to instructions\n"; -print DISASM_HPP "// Referenced by InstArgsTbl[]\n"; -$nbelement=@argstypes; -print DISASM_HPP "\#define ArgsTextTblLength $nbelement\n"; -$elementnb=0; -print DISASM_HPP "static char *ArgsTextTbl[] = {\n"; -foreach $args (@argstypes) { - print DISASM_HPP " \"$args\""; - ($elementnb++ < $nbelement-1) and print DISASM_HPP ","; - print DISASM_HPP "\n"; -} -print DISASM_HPP "};\n"; -print DISASM_HPP "\n\n"; -# ------------------------------------------------------------------------------ -for ($i=0 ; $i< 256; $i++) { - print INST_IMP "/"x78,"\n"; - print INST_IMP "// void CPU8051::OP_$a_opcodehex[$i]( )\n"; - print INST_IMP "// Instruction \"$a_instruction[$i]\" takes $a_cycles[$i] cycle(s) and $a_bytes[$i] byte(s)\n"; - print INST_IMP "/"x78,"\n"; - print INST_IMP "int CPU8051::OP_$a_opcodehex[$i]( )\n"; - print INST_DEF "int OP_$a_opcodehex[$i]( );\n"; - print INST_IMP "{\n"; - - if ($i == 0x85) { - # Cas particulier pour MOV direct,direct -> src et dest sont inverses dans la memoire - print INST_IMP "unsigned char srcaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "unsigned char source = ReadD( srcaddr );\n"; - print INST_IMP "unsigned char destaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "unsigned char destination = ReadD( destaddr );\n"; - print INST_IMP "destination = source;\n"; - print INST_IMP "WriteD( destaddr, destination );\n"; - } else { - -if ($instargs[$i*4] > 0) { - $op_destination=$instargs[$i*4+1]; - if ($op_destination == 0) { # addr11 - print INST_IMP "unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ );\n"; - } - if ($op_destination == 1) { # addr16 - print INST_IMP "unsigned int addr16 = ( PGMMem->Read8( PC++ ) << 8 );\n"; - print INST_IMP "addr16 += PGMMem->Read8( PC++ );\n"; - } - if ($op_destination == 2) { # A - print INST_IMP "unsigned char destination = ReadD( _ACC_ );\n"; - } - if ($op_destination == 3) { # direct - print INST_IMP "unsigned char destaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "unsigned char destination = ReadD( destaddr );\n"; - } - if ($op_destination == 4) { # @R0 - print INST_IMP "unsigned char destination = ReadI ( ReadD( BANKPSW + _R0_ ) );\n"; - } - if ($op_destination == 5) { # @R1 - print INST_IMP "unsigned char destination = ReadI ( ReadD( BANKPSW + _R1_ ) );\n"; - } - - if ($op_destination == 6) { # R0 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R0_ );\n"; - } - if ($op_destination == 7) { # R1 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R1_ );\n"; - } - if ($op_destination == 8) { # R2 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R2_ );\n"; - } - if ($op_destination == 9) { # R3 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R3_ );\n"; - } - if ($op_destination == 10) { # R4 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R4_ );\n"; - } - if ($op_destination == 11) { # R5 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R5_ );\n"; - } - if ($op_destination == 12) { # R6 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R6_ );\n"; - } - if ($op_destination == 13) { # R7 - print INST_IMP "unsigned char destination = ReadD( BANKPSW + _R7_ );\n"; - } - if ($op_destination == 14) { # bitaddr - print INST_IMP "unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "destination = ReadB( dstbitaddr );\n"; - } - if ($op_destination == 15) { # reladdr - print INST_IMP "PC++;\n"; - print INST_IMP "unsigned int destination = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 );\n"; - } - if ($op_destination == 16) { # #data - print INST_IMP "unsigned char destination = PGMMem->Read8( PC++ );\n"; - } - if ($op_destination == 17) { # C - print INST_IMP "unsigned char destination = ( ReadD( _PSW_ ) >> 7 );\n"; - } - if ($op_destination == 18) { # @A+DPTR - print INST_IMP "unsigned int destination = ReadI( ReadD( _ACC_ ) + ReadD( _DPTRLOW_ ) + ( ReadD( _DPTRHIGH_ ) << 8 ) );\n"; - } -# Mis en commentaire car donnait un warning (destination et source unused variables...) -# if ($op_destination == 20) { # AB -# print INST_IMP "unsigned char destination = ReadD( _ACC_ );\n"; -# print INST_IMP "unsigned char source = ReadD( _B_ );\n"; -# } - if ($op_destination == 21) { # DPTR - print INST_IMP "unsigned int destination = ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ );\n"; - } - if ($op_destination == 22) { # #data16 - print INST_IMP "unsigned char destination = ( PGMMem->Read8( PC++ ) << 8 );\n"; - print INST_IMP "destination += PGMMem->Read8( PC++ );\n"; - } - if ($op_destination == 23) { # /bitaddr - print INST_IMP "unsigned char destination, dstbitaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "destination = ( ReadB( dstbitaddr ) ^ 1 );\n"; - } - if ($op_destination == 24) { # @DPTR - print INST_IMP "unsigned char destination = ReadI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_) );\n"; - } - } - - if ($instargs[$i*4] > 1) { - $op_source=$instargs[$i*4+2]; - if ($op_source == 0) { # addr11 - print INST_IMP "unsigned int addr11 = ( ( PGMMem->Read8( PC - 1 ) << 3 ) & 0xF00 ) + PGMMem->Read8( PC++ );\n"; - } - if ($op_source == 1) { # addr16 - print INST_IMP "unsigned int addr16 = ( PGMMem->Read8( PC++ ) << 8 );\n"; - print INST_IMP "addr16 += PGMMem->Read8( PC++ );\n"; - } - if ($op_source == 2) { # A - print INST_IMP "unsigned char source = ReadD( _ACC_ );\n"; - } - if ($op_source == 3) { # direct - print INST_IMP "unsigned char srcaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "unsigned char source = ReadD( srcaddr );\n"; - } - if ($op_source == 4) { # @R0 - print INST_IMP "unsigned char source = ReadI ( ReadD( BANKPSW + _R0_ ) );\n"; - } - if ($op_source == 5) { # @R1 - print INST_IMP "unsigned char source = ReadI ( ReadD( BANKPSW + _R1_ ) );\n"; - } - if ($op_source == 6) { # R0 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R0_ );\n"; - } - if ($op_source == 7) { # R1 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R1_ );\n"; - } - if ($op_source == 8) { # R2 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R2_ );\n"; - } - if ($op_source == 9) { # R3 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R3_ );\n"; - } - if ($op_source == 10) { # R4 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R4_ );\n"; - } - if ($op_source == 11) { # R5 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R5_ );\n"; - } - if ($op_source == 12) { # R6 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R6_ );\n"; - } - if ($op_source == 13) { # R7 - print INST_IMP "unsigned char source = ReadD( BANKPSW + _R7_ );\n"; - } - - if ($op_source == 14) { # bitaddr - print INST_IMP "unsigned char source, srcbitaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "source = ReadB( srcbitaddr );\n"; - } - if ($op_source == 15) { # reladdr - print INST_IMP "PC++;\n"; - print INST_IMP "unsigned int source = ( ( PGMMem->Read8( PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 );\n"; - } - if ($op_source == 16) { # #data - print INST_IMP "unsigned char source = PGMMem->Read8( PC++ );\n"; - } - if ($op_source == 17) { # C - print INST_IMP "unsigned char source = ( ReadD( _PSW_ ) >> 7 );\n"; - } - if ($op_source == 18) { # @A+DPTR - print INST_IMP "unsigned char source = PGMMem->Read8( ReadD( _ACC_ ) + ReadD( _DPTRLOW_ ) + ( ReadD( _DPTRHIGH_ ) << 8 ) );\n"; - } - if ($op_source == 19) { # @A+PC - print INST_IMP "unsigned char source = PGMMem->Read8( ReadD( _ACC_ ) + ( ++PC ) );\n"; - } - if ($op_source == 21) { # DPTR - print INST_IMP "unsigned int source = ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ );\n"; - } - if ($op_source == 22) { # #data16 - print INST_IMP "unsigned char source = ( PGMMem->Read8( PC++ ) << 8 );\n"; - print INST_IMP "source += PGMMem->Read8( PC++ );\n"; - } - if ($op_source == 23) { # /bitaddr - print INST_IMP "unsigned char source, srcbitaddr = PGMMem->Read8( PC++ );\n"; - print INST_IMP "source = ( ReadB( srcbitaddr ) ^ 1 );\n"; - } - if ($op_source == 24) { # @DPTR - print INST_IMP "unsigned char source = ReadI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_) );\n"; - } - } - -############################################################################## - $modifysrc=0; -# print INST_IMP "\n// Inserer le code ici\n\n"; - - # RR - if ($insttype[$i] == 3) { - print INST_IMP "destination = ( destination >> 1 ) | ( destination << 7 );\n"; - } - - # INC - if ($insttype[$i] == 4) { - print INST_IMP "destination++;\n"; - } - - # JBC - if ($insttype[$i] == 5) { - print INST_IMP "if ( destination == 1 ) { PC = source; destination = 0; }\n"; - } - - # ACALL - if ($insttype[$i] == 6) { - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "WriteI( ++SP, ( PC & 0x00FF ) );\n"; - print INST_IMP "WriteI( ++SP, ( PC >> 8 ) );\n"; - print INST_IMP "WriteD( _SP_, SP );\n"; - } - - # LCALL - if ($insttype[$i] == 7) { - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "WriteI( ++SP, ( PC & 0x00FF ) );\n"; - print INST_IMP "WriteI( ++SP, ( PC >> 8 ) );\n"; - print INST_IMP "WriteD( _SP_, SP );\n"; - } - - # RRC - if ($insttype[$i] == 8) { - print INST_IMP "unsigned char tmpval = destination;\n"; - print INST_IMP "destination = ( destination >> 1 ) | ( ReadD( _PSW_ ) & 0x80 );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) | ( tmpval << 7 ) );\n"; - } - - # DEC - if ($insttype[$i] == 9) { - print INST_IMP "destination--;\n"; - } - - # JB - if ($insttype[$i] == 10) { - print INST_IMP "if ( destination == 1 ) { PC = source; }\n"; - } - - # RET - if ($insttype[$i] == 11) { - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "PC = ( ReadI( SP-- ) << 8 );\n"; - print INST_IMP "PC += ReadI ( SP-- );\n"; - print INST_IMP "WriteD( _SP_, SP );\n"; - } - - # RL - if ($insttype[$i] == 12) { - print INST_IMP "destination = ( destination << 1 ) | ( destination >> 7 );\n"; - } - - # ADD - if ($insttype[$i] == 13) { - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) );\n"; - print INST_IMP "if ( destination + source > 0xFF ) {\n"; - print INST_IMP " WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "destination += source;\n"; - } - - # JNB - if ($insttype[$i] == 14) { - print INST_IMP "if ( destination == 0 ) { PC = source; }\n"; - } - - # RETI - if ($insttype[$i] == 15) { - print INST_IMP "ActivePriority = -1;\n"; - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "PC = ( ReadI( SP-- ) << 8 );\n"; - print INST_IMP "PC += ReadI( SP-- );\n"; - } - - # RLC - if ($insttype[$i] == 16) { - print INST_IMP "unsigned char tmpval = destination;\n"; - print INST_IMP "destination = ( destination << 1 ) | ( ( ReadD( _PSW_ ) & 0x80 ) >> 7 );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) | ( tmpval & 0x80 ) );\n"; - } - - # ADDC - if ($insttype[$i] == 17) { - print INST_IMP "unsigned char carryflag = ( ReadD( _PSW_ ) >> 7 );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) );\n"; - print INST_IMP "if ( destination + source + carryflag > 0xFF ) {\n"; - print INST_IMP " WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) );\n"; - print INST_IMP "destination += source;\n"; - } - - # JC - if ($insttype[$i] == 18) { - print INST_IMP "if ( ReadD( _PSW_ ) > 0x7F) { PC = destination; }\n"; - } - - # ORL - if ($insttype[$i] == 19) { - if ($instargs[$i*4+1] == 17) { - # sur des bits - print INST_IMP "WriteD( _PSW_ , ( ( destination | source ) << 7 ) );\n"; - } else { - # sur des bytes - print INST_IMP "destination |= source;\n"; - } - } - - # JNC - if ($insttype[$i] == 20) { - print INST_IMP "if ( ReadD( _PSW_ ) < 0x80 ) { PC = destination; }\n"; - } - - # ANL - if ($insttype[$i] == 21) { - if ($instargs[$i*4+1] == 17) { - # sur des bits - print INST_IMP "WriteD( _PSW_, ( ( destination & source) << 7 ) );\n"; - } else { - # sur des bytes - print INST_IMP "destination &= source;\n"; - } - } - - # JZ - if ($insttype[$i] == 22) { - print INST_IMP "if ( ReadD( _ACC_ ) == 0 ) { PC = destination; }\n"; - } - - # XRL - if ($insttype[$i] == 23) { - print INST_IMP "destination ^= source;\n"; - } - - # JNZ - if ($insttype[$i] == 24) { - print INST_IMP "if ( ReadD( _ACC_ ) != 0 ) { PC = destination; }\n"; - } - - # JMP - if ($insttype[$i] == 25) { - print INST_IMP "PC = destination;\n"; - } - - # MOV - if ($insttype[$i] == 26) { - print INST_IMP "destination = source;\n"; - } - - # SJMP - if ($insttype[$i] == 27) { - print INST_IMP "PC = destination;\n"; - } - - # MOVC - if ($insttype[$i] == 28) { - print INST_IMP "destination = source;\n"; - } - - # DIV - if ($insttype[$i] == 29) { - print INST_IMP "unsigned char A = ReadD( _ACC_ ), B = ReadD( _B_ );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7B ) );\n"; - print INST_IMP "if ( B != 0 ) {\n"; - print INST_IMP "WriteD( _ACC_, A/B ); WriteD( _B_, A%B );\n"; - print INST_IMP "} else WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - } - - # SUBB - if ($insttype[$i] == 30) { - print INST_IMP "unsigned char carryflag = ReadD( _PSW_ ) >> 7;\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x3B ) );\n"; - print INST_IMP "if ( destination < ( source + carryflag ) ) {\n"; - print INST_IMP " WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP " if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - print INST_IMP "if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x40 ) );\n"; - print INST_IMP "destination -= source + carryflag;\n"; - } - - # MUL - if ($insttype[$i] == 31) { - print INST_IMP "unsigned char A = ReadD( _ACC_ ), B = ReadD( _B_ );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7B ) );\n"; - print INST_IMP "WriteD( _ACC_ , ( ( A * B ) & 0x00FF ) ); WriteD( _B_, ( A * B ) / 0x100 );\n"; - print INST_IMP "if ( ReadD( _B_ ) > 0) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x04 ) );\n"; - } - - # CPL - if ($insttype[$i] == 33) { - if ($instargs[$i*4+1] == 2) { print INST_IMP "destination ^= 0xFF;\n"; } - else { print INST_IMP "destination ^= 0x01;\n"; } - } - - # CJNE - if ($insttype[$i] == 34) { - print INST_IMP "unsigned int reladdr = ( ( PGMMem->Read8( PC ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 );\n"; - print INST_IMP "WriteD( _PSW_, ( ReadD( _PSW_ ) & 0x7F ) );\n"; - print INST_IMP "if ( destination < source ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP "if ( destination != source ) PC = reladdr;\n"; - } - - # PUSH - if ($insttype[$i] == 35) { - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "WriteI( ++SP, destination );\n"; - print INST_IMP "WriteD( _SP_, SP );\n"; - } - - # CLR - if ($insttype[$i] == 36) { - print INST_IMP "destination = 0;\n"; - } - - # SWAP - if ($insttype[$i] == 37) { - print INST_IMP "destination = ( destination << 4 ) + ( destination >> 4 );\n"; - } - - # XCH - if ($insttype[$i] == 38) { - print INST_IMP "unsigned char tmpval = destination;\n"; - print INST_IMP "destination = source; source = tmpval;\n"; - $modifysrc=1; - } - - # POP - if ($insttype[$i] == 39) { - print INST_IMP "unsigned char SP = ReadD( _SP_ );\n"; - print INST_IMP "destination = ReadI( SP-- );\n"; - print INST_IMP "WriteD( _SP_, SP );\n"; - } - - # SETB - if ($insttype[$i] == 40) { - print INST_IMP "destination = 1;\n"; - } - - # DA - if ($insttype[$i] == 41) { - print INST_IMP "if ( ( ( destination & 0x0F ) > 9) || ( ReadD( _PSW_ ) | 0x40)) {\n"; - print INST_IMP " if ( ( destination + 6 ) > 0xFF) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP " destination += 6;\n"; - print INST_IMP "}\n"; - print INST_IMP "if ( ( ReadD( _PSW_ ) & 0x80) || ( ( destination & 0xF0 ) > 0x90 ) ) {\n"; - print INST_IMP " if ( ( destination + 0x60 ) > 0xFF ) WriteD( _PSW_, ( ReadD( _PSW_ ) | 0x80 ) );\n"; - print INST_IMP " destination += 0x60;\n"; - print INST_IMP "}\n"; - } - - # DJNZ - if ($insttype[$i] == 42) { - print INST_IMP "destination--;\n"; - print INST_IMP "if ( destination != 0 ) PC = source;\n"; - } - - # XCHD - if ($insttype[$i] == 43) { - print INST_IMP "unsigned char tmpval = ( destination & 0x0F );\n"; - print INST_IMP "destination = ( destination & 0xF0 ) + ( source & 0x0F );\n"; - print INST_IMP "source = ( source & 0xF0 ) + tmpval;\n"; - $modifysrc=1; - } - - # MOVX - if ($insttype[$i] == 44) { - print INST_IMP "destination = source;\n"; - } - - - -############################################################################## - - - if ($instargs[$i*4] > 0) { - $op_destination=$instargs[$i*4+1]; - if ($op_destination == 0) { # addr11 - print INST_IMP "PC = ( PC & 0xF800 ) | addr11;\n"; - } - if ($op_destination == 1) { # addr16 - print INST_IMP "PC = addr16;\n"; - } - if ($op_destination == 2) { # A - print INST_IMP "WriteD( _ACC_, destination );\n"; - } - if ($op_destination == 3) { # direct - print INST_IMP "WriteD( destaddr, destination );\n"; - } - if ($op_destination == 4) { # @R0 - print INST_IMP "WriteI( ReadD( BANKPSW + _R0_ ), destination );\n"; - } - if ($op_destination == 5) { # @R1 - print INST_IMP "WriteI( ReadD( BANKPSW + _R1_ ), destination );\n"; - } - if ($op_destination == 6) { # R0 - print INST_IMP "WriteD( BANKPSW + _R0_, destination );\n"; - } - if ($op_destination == 7) { # R1 - print INST_IMP "WriteD( BANKPSW + _R1_, destination );\n"; - } - if ($op_destination == 8) { # R2 - print INST_IMP "WriteD( BANKPSW + _R2_, destination );\n"; - } - if ($op_destination == 9) { # R3 - print INST_IMP "WriteD( BANKPSW + _R3_, destination );\n"; - } - if ($op_destination == 10) { # R4 - print INST_IMP "WriteD( BANKPSW + _R4_, destination );\n"; - } - if ($op_destination == 11) { # R5 - print INST_IMP "WriteD( BANKPSW + _R5_, destination );\n"; - } - if ($op_destination == 12) { # R6 - print INST_IMP "WriteD( BANKPSW + _R6_, destination );\n"; - } - if ($op_destination == 13) { # R7 - print INST_IMP "WriteD( BANKPSW + _R7_, destination );\n"; - } - - if ($op_destination == 14) { # bitaddr - print INST_IMP "WriteB( dstbitaddr, destination );\n"; - } - if ($op_destination == 17) { # C - print INST_IMP "WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) );\n"; - } - if ($op_destination == 21) { # DPTR - print INST_IMP "WriteD( _DPTRHIGH_, ( destination >> 8 ) );\n"; - print INST_IMP "WriteD( _DPTRLOW_, ( destination & 0xFF ) );\n"; - } - if ($op_destination == 23) { # /bitaddr - print INST_IMP "WriteB( dstbitaddr, destination );\n"; - } - if ($op_destination == 24) { # @DPTR - print INST_IMP "WriteI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ ), destination );\n"; - } - } - - if ($modifysrc == 1) { - if ($instargs[$i*4] > 1) { - $op_source=$instargs[$i*4+2]; - if ($op_source == 0) { # addr11 - print INST_IMP "PC = ( PC & 0xF800 ) | addr11;\n"; - } - if ($op_source == 1) { # addr16 - print INST_IMP "PC = addr16;\n"; - } - if ($op_source == 2) { # A - print INST_IMP "WriteD( _ACC_, source );\n"; - } - if ($op_source == 3) { # direct - print INST_IMP "WriteD( srcaddr, source );\n"; - } - if ($op_source == 4) { # @R0 - print INST_IMP "WriteI( ReadD( BANKPSW + _R0_ ), source );\n"; - } - if ($op_source == 5) { # @R1 - print INST_IMP "WriteI( ReadD( BANKPSW + _R1_ ), source );\n"; - } - if ($op_source == 6) { # R0 - print INST_IMP "WriteD( BANKPSW + _R0_, source );\n"; - } - if ($op_source == 7) { # R1 - print INST_IMP "WriteD( BANKPSW + _R1_, source );\n"; - } - if ($op_source == 8) { # R2 - print INST_IMP "WriteD( BANKPSW + _R2_, source );\n"; - } - if ($op_source == 9) { # R3 - print INST_IMP "WriteD( BANKPSW + _R3_, source );\n"; - } - if ($op_source == 10) { # R4 - print INST_IMP "WriteD( BANKPSW + _R4_, source );\n"; - } - if ($op_source == 11) { # R5 - print INST_IMP "WriteD( BANKPSW + _R5_, source );\n"; - } - if ($op_source == 12) { # R6 - print INST_IMP "WriteD( BANKPSW + _R6_, source );\n"; - } - if ($op_source == 13) { # R7 - print INST_IMP "WriteD( BANKPSW + _R7_, source );\n"; - } - if ($op_source == 14) { # bitaddr - print INST_IMP "WriteB( srcbitaddr, source );\n"; - } - if ($op_source == 17) { # C - print INST_IMP "WriteD( _PSW_, ( ( ReadD( _PSW_ ) & 0x7F) | ( source << 7 ) ) );\n"; - } - if ($op_source == 21) { # DPTR - print INST_IMP "WriteD( _DPTRHIGH_, ( source >> 8 ) );\n"; - print INST_IMP "WriteD( _DPTRLOW_, ( source & 0xFF ) );\n"; - } - if ($op_source == 23) { # /bitaddr - print INST_IMP "WriteB( srcbitaddr, source );\n"; - } - if ($op_source == 24) { # @DPTR - print INST_IMP "WriteI( ( ReadD( _DPTRHIGH_ ) << 8 ) + ReadD( _DPTRLOW_ ), source );\n"; - } - } -} -} - print INST_IMP "return $a_cycles[$i];\n"; - print INST_IMP "}\n"; - print INST_IMP "\n\n"; -} -# ------------------------------------------------------------------------------ -print INST_IMP "\n\n"; - - print INST_IMP "/"x78,"\n"; - print INST_IMP "// void CPU8051::InitFuncPtr( )\n"; - print INST_IMP "// Initialize Functions Pointers\n"; - print INST_IMP "/"x78,"\n"; - print INST_IMP "void CPU8051::InitFuncPtr( )\n"; - print INST_DEF "void InitFuncPtr( );\n"; - print INST_IMP "{\n"; - - -#print INST_IMP "static int (*instfnc[])() = {\n"; -for ($i=0;$i<256;$i++) { - $ifunc=substr($instfunction[$i], 9); - print INST_IMP " funcptr[$i]=&CPU8051::$ifunc;\n"; -# ($i < 255) and print INST_IMP ",\n"; -# (($i+1) % 4 == 0) and print INST_IMP "\n"; -} -print INST_IMP "\n}\n"; - -print INST_IMP "\n\n#endif\n"; -print INST_DEF "\n\n#endif\n"; -print DISASM_HPP "\n\n#endif\n"; - - -close DISASM_HPP; -close OPCODELST; -close INST_DEF; -close INST_IMP; - - diff --git a/src/PgmWin.hpp b/src/PgmWin.hpp deleted file mode 100644 index 0bf5820..0000000 --- a/src/PgmWin.hpp +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef _PGMWIN_HPP_ -#define _PGMWIN_HPP_ - -#include -#include "CPU8051.hpp" -#include "GtkSizes.hpp" - -#define MAXBP 32 - -////////////////////////////////////////////////////////////////////////////// -// PgmWin -// Implements a Program Window in Gtk+ as an Object -////////////////////////////////////////////////////////////////////////////// -class PgmWin { -public: - PgmWin( GtkWidget *parentwin, CPU8051 *mCPU ); - ~PgmWin( ); - - void Disasm( ); - gint ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); - - void ShowBreakpoints( ); - void SetBreakpoint( unsigned int Address ); - void ClearBreakpoint( unsigned int Address ); - int IsBreakpoint( unsigned int Address ); - void ToggleBreakpoint( unsigned int Address ); - -private: - CPU8051 *CPU; - GtkWidget *pgmwin; - GtkWidget *pgmclist; - int NbBreakpoints; - unsigned int Breakpoints[ MAXBP ]; - unsigned int DisasmAddresses[ 24 ]; - -}; - -void PgmWinButtonPress( GtkWidget *widget, GdkEvent *event, gpointer data ); - - -#endif diff --git a/src/Reg8051.hpp b/src/Reg8051.hpp deleted file mode 100644 index 1e6a65e..0000000 --- a/src/Reg8051.hpp +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef __REGISTRES8051_HPP_ -#define __REGISTRES8051_HPP_ - -// SFR Registers ( $80 - $FF ) -#define _ACC_ 0xE0 -#define _B_ 0xF0 -#define _PSW_ 0xD0 -#define _SP_ 0x81 -#define _DPTRLOW_ _DPL_ -#define _DPTRHIGH_ _DPH_ -#define _DPL_ 0x82 -#define _DPH_ 0x83 -#define _P0_ 0x80 -#define _P1_ 0x90 -#define _P2_ 0xA0 -#define _P3_ 0xB0 -#define _IP_ 0xB8 -#define _IE_ 0xA8 -#define _TMOD_ 0x89 -#define _TCON_ 0x88 -#define _TH0_ 0x8C -#define _TL0_ 0x8A -#define _TH1_ 0x8D -#define _TL1_ 0x8B -#define _SCON_ 0x98 -#define _SBUF_ 0x99 -#define _PCON_ 0x87 -#define _T2CON_ 0xC8 - -#define _R0_ 0x00 -#define _R1_ 0x01 -#define _R2_ 0x02 -#define _R3_ 0x03 -#define _R4_ 0x04 -#define _R5_ 0x05 -#define _R6_ 0x06 -#define _R7_ 0x07 - -#define _BANK0_ 0x00 -#define _BANK1_ 0x08 -#define _BANK2_ 0x10 -#define _BANK3_ 0x18 - -#endif diff --git a/src/RegWin.hpp b/src/RegWin.hpp deleted file mode 100644 index cd43721..0000000 --- a/src/RegWin.hpp +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _REGWIN_HPP_ -#define _REGWIN_HPP_ - -#include -#include "CPU8051.hpp" -#include "GtkSizes.hpp" - -////////////////////////////////////////////////////////////////////////////// -// RegWin -// Implements a Registers Window in Gtk+ as an Object -////////////////////////////////////////////////////////////////////////////// -class RegWin { -public: - RegWin( GtkWidget *parentwin ); - ~RegWin( ); - - void Show( CPU8051 *CPU ); - -private: - GtkWidget *regwin; - GtkWidget *regclist; - - -}; - -#endif diff --git a/src/cpu8051.c b/src/cpu8051.c new file mode 100644 index 0000000..1bdc42e --- /dev/null +++ b/src/cpu8051.c @@ -0,0 +1,616 @@ +/* cpu8051.c */ + + +#include + +#include "reg8051.h" +#include "cpu8051.h" +#include "memory.h" +#include "disasm.h" +#include "instructions_8051.h" + + +unsigned int PC = 0; +unsigned long CLOCK = 0; +int ActivePriority = -1; + + +extern OPCODE_FP opcode_table[256]; + + +////////////////////////////////////////////////////////////////////////////// +// Execute at address PC from PGMMem +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_Exec( void ) +{ + int i; + unsigned char opcode; + int insttiming; + + opcode = memory_read8( PGM_MEM_ID, PC ); + PC++; + insttiming = (*opcode_table[opcode])(); /* Function callback. */ + + for( i = 0; i < insttiming; i++ ) { + cpu8051_CheckInterrupts(); + cpu8051_DoTimers(); + CLOCK++; + } +} + + +////////////////////////////////////////////////////////////////////////////// +// Return PC + size in bytes of current instruction +////////////////////////////////////////////////////////////////////////////// +unsigned int +cpu8051_GetNextAddress( void ) +{ +#ifdef DECPP + return ( PC + InstSizesTbl[ memory_read8( PGM_MEM_ID, PC ) ] ); +#endif + return 0; /* temp */ +} + + +////////////////////////////////////////////////////////////////////////////// +// Reset the registers and CPU state +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_Reset( void ) +{ + PC = 0; + CLOCK = 0; + ActivePriority = -1; + + // Reinitialisation des registres + int i; + for ( i = 0; i < 128; i++ ) { + + memory_write8( SFR_MEM_ID, i, 0 ); + + memory_write8( INT_MEM_ID, i, 0 ); + } + + memory_write8( SFR_MEM_ID, _P0_ - 0x80, 0xFF ); + memory_write8( SFR_MEM_ID, _P1_ - 0x80, 0xFF ); + memory_write8( SFR_MEM_ID, _P2_ - 0x80, 0xFF ); + memory_write8( SFR_MEM_ID, _P3_ - 0x80, 0xFF ); + memory_write8( SFR_MEM_ID, _SP_ - 0x80, 0x07 ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Write with a direct addressing mode at Address the new Value +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_WriteD( unsigned int Address, unsigned char Value ) +{ + if ( Address > 0x7F ) { + memory_write8( SFR_MEM_ID, Address - 0x80, Value ); + return; + } + + memory_write8( INT_MEM_ID, Address, Value ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Ecriture d'une valeur dans la memoire interne ( Address = $00 a $FF ) +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_WriteInt( unsigned int Address, unsigned char Value ) +{ + if ( Address > 0x7F ) { + memory_write8( SFR_MEM_ID, Address - 0x80, Value ); + } + else { + memory_write8( INT_MEM_ID, Address, Value ); + } + + return; +} + + +////////////////////////////////////////////////////////////////////////////// +// Write with an indirect addressing mode at Address the new Value +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_WriteI( unsigned int Address, unsigned char Value ) +{ + if ( Address > 0x7F ) { + memory_write8( EXT_MEM_ID, Address, Value ); + return; + } + + memory_write8( INT_MEM_ID, Address, Value ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Read with a direct addressing mode at Address +////////////////////////////////////////////////////////////////////////////// +unsigned char +cpu8051_ReadD( unsigned int Address ) +{ + if ( Address > 0xFF ) { + return memory_read8( EXT_MEM_ID, Address ); + } + + if ( Address > 0x7F ) { + return memory_read8( SFR_MEM_ID, Address - 0x80 ); + } + + return memory_read8( INT_MEM_ID, Address ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Read Internal data memory at Address +////////////////////////////////////////////////////////////////////////////// +unsigned char +cpu8051_ReadInt( unsigned int Address ) +{ + if ( Address > 0x7F ) { + return memory_read8( SFR_MEM_ID, Address - 0x80 ); + } + else { + return memory_read8( INT_MEM_ID, Address ); + } +} + + +////////////////////////////////////////////////////////////////////////////// +// unsigned char cpu8051_ReadI( unsigned int Address ) +// Read with a indirect addressing mode at Address +////////////////////////////////////////////////////////////////////////////// +unsigned char +cpu8051_ReadI( unsigned int Address ) +{ + if ( Address > 0x7F ) { + return memory_read8( EXT_MEM_ID, Address ); + } + else { + return memory_read8( INT_MEM_ID, Address ); + } +} + + +////////////////////////////////////////////////////////////////////////////// +// Write with a bit addressing mode at BitAddress the new Value +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_WriteB( unsigned int BitAddress, unsigned char Value ) +{ + unsigned int ByteAddress, BitNumber; + unsigned char ByteValue, ByteMask; + + if ( BitAddress > 0x7F ) { + // SFR 80-FF + ByteAddress = BitAddress & 0xF8; + BitNumber = BitAddress & 0x07; + } + else { + // 20-2F + ByteAddress = ( BitAddress >> 3 ) + 0x20; + BitNumber = BitAddress & 0x07; + } + ByteMask = ( ( 1 << BitNumber ) ^ 0xFF ); + ByteValue = cpu8051_ReadD( ByteAddress ) & ByteMask; + ByteValue += Value << BitNumber; + cpu8051_WriteD( ByteAddress, ByteValue ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Read with a bit addressing mode at BitAddress +////////////////////////////////////////////////////////////////////////////// +unsigned char +cpu8051_ReadB( unsigned int BitAddress ) +{ + unsigned int ByteAddress, BitNumber; + unsigned char BitValue; + + if ( BitAddress > 0x7F ) { + // SFR 80-FF + ByteAddress = BitAddress & 0xF8; + BitNumber = BitAddress & 0x07; + } + else { + // 20-2F + ByteAddress = ( BitAddress >> 3 ) + 0x20; + BitNumber = BitAddress & 0x07; + } + BitValue = ( cpu8051_ReadD( ByteAddress ) >> BitNumber ); + BitValue &= 1; + return BitValue; +} + + +////////////////////////////////////////////////////////////////////////////// +// Check interrupts state and process them as needed +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_CheckInterrupts() +{ + unsigned char SP; + int i; + + if ( cpu8051_ReadD( _IE_ ) & 0x80 ) { + for ( i = 1; i >= 0; i-- ) + if ( ActivePriority < i ) { + //------------------------- External interrupt 0 ---------------------------- + // if ( ( cpu8051_ReadD( _IE_ ) & 0x01 ) && ( ( cpu8051_ReadD( _IP_ ) & 0x01 ) ? i : !i ) && pin0 ) + //-------------------------- Interrupt timer 0 ------------------------------- + if ( ( cpu8051_ReadD( _IE_ ) & 0x02 ) && ( ( cpu8051_ReadD( _IP_ & 0x02 ) ? i : !i ) && ( cpu8051_ReadD( _TCON_ ) & 0x20 ) ) ){ + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) & 0xDF ); + SP = cpu8051_ReadD( _SP_ ); + cpu8051_WriteI( ++SP, ( PC & 0xFF ) ); + cpu8051_WriteI( ++SP, ( PC >> 8 ) ); + cpu8051_WriteD( _SP_, SP ); + PC = 0x0B; + ActivePriority = i; + return; + } + //-------------------------- External interrupt 1 ---------------------------- + // if ( ( cpu8051_ReadD( _IE_ ) & 0x04 ) && ( ( cpu8051_ReadD( _IP_ ) & 0x04 ) ? i : !i ) && pin1 ) + //-------------------------- Interrupt timer 1 ------------------------------- + if ( ( cpu8051_ReadD( _IE_ ) & 0x08 ) && ( ( cpu8051_ReadD( _IP_ ) & 0x08 ) ? i : !i ) && ( cpu8051_ReadD( _TCON_ ) & 0x80 ) ) { + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) & 0x7F ); + SP = cpu8051_ReadD( _SP_ ); + cpu8051_WriteI( ++SP, ( PC & 0xFF ) ); + cpu8051_WriteI( ++SP, ( PC >> 8 ) ); + cpu8051_WriteD( _SP_, SP ); + PC = 0x1B; + ActivePriority = i; + return; + } + //-------------------------- Serial Interrupts ------------------------------- + if ( ( cpu8051_ReadD( _IE_ ) & 0x10 ) && ( ( cpu8051_ReadD( _IP_ ) & 0x10 ) ? i : !i ) && ( cpu8051_ReadD( _SCON_ ) & 0x03 ) ) { + SP = cpu8051_ReadD( _SP_ ); + cpu8051_WriteI( ++SP, ( PC & 0xFF ) ); + cpu8051_WriteI( ++SP, ( PC >> 8 ) ); + cpu8051_WriteD( _SP_, SP ); + PC = 0x23; + ActivePriority = i; + return; + } + //-------------------------- Interrupt timer 2 ------------------------------- + if ( ( cpu8051_ReadD( _IE_ ) & 0x20 ) && ( ( cpu8051_ReadD( _IP_ ) & 0x20 ) ? i : !i ) && ( cpu8051_ReadD( _T2CON_ ) & 0x80 ) ) { + SP = cpu8051_ReadD( _SP_ ); + cpu8051_WriteI( ++SP, ( PC & 0xFF ) ); + cpu8051_WriteI( ++SP, ( PC >> 8 ) ); + cpu8051_WriteD( _SP_, SP ); + PC = 0x2B; + ActivePriority = i; + return; + } + } + } +} + + +////////////////////////////////////////////////////////////////////////////// +// Execute les timers +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_DoTimers( ) +{ + unsigned int tmp; + unsigned int TR; + unsigned int MODE; + unsigned int GATE; + unsigned int TimerCounter; + + // ----- Timer 0 + TR = cpu8051_ReadD( _TCON_ ) & 0x10; + MODE = cpu8051_ReadD( _TMOD_ ) & 0x03; + GATE = cpu8051_ReadD( _TMOD_ ) & 0x08; + TimerCounter = cpu8051_ReadD( _TMOD_ ) & 0x04; + + if ( ( TR && !GATE && !TimerCounter ) || ( MODE == 3 ) ) + switch( MODE ) { + // Mode 0, compteur de 13 bits. + case 0 : + tmp = cpu8051_ReadD( _TH0_ ) * 0x100 + cpu8051_ReadD( _TL0_ ); + + tmp++; + tmp &= 0x1FFF; // On ne garde que 13 bits. + + if ( tmp == 0 ) // If overflow set TF0 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x20 ); + cpu8051_WriteD( _TH0_, tmp / 0x100 ); + cpu8051_WriteD( _TL0_, tmp & 0xFF ); + break; + + // Mode 1, compteur de 16 bits. + case 1 : + tmp = cpu8051_ReadD( _TH0_ ) * 0x100 + cpu8051_ReadD( _TL0_ ); + tmp++; + tmp &= 0xFFFF; // On ne garde que 16 bits. + if ( tmp == 0 ) // If overflow set TF0 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x20 ); + cpu8051_WriteD( _TH0_, ( tmp / 0x100 ) ); + cpu8051_WriteD( _TL0_, ( tmp & 0xFF ) ); + break; + + // Mode 2, Compteur de 8 bits avec Auto-Reload + case 2 : + tmp = cpu8051_ReadD( _TL0_ ); + tmp++; + tmp &= 0xFF; + if ( tmp == 0 ) { // If overflow -> reload et set TF0 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x20 ); + cpu8051_WriteD( _TL0_, cpu8051_ReadD( _TH0_ ) ); + } + else + cpu8051_WriteD( _TL0_, tmp ); + break; + + // Mode 3 : TL0 et TH0 sont 2 Timers independants de 8 bits chacuns. + case 3 : + if ( TR && !GATE && !TimerCounter ) { + tmp = cpu8051_ReadD( _TL0_ ); + tmp++; + tmp &= 0xFF; + if ( tmp == 0 ) // If TL0 overflow set TF0 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x20 ); + cpu8051_WriteD( _TL0_, tmp ); + } // TH0 utilise TR1 et TF1. + TR = cpu8051_ReadD( _TCON_ ) & 0x40; + if ( TR ) { + tmp = cpu8051_ReadD( _TH0_ ); + tmp++; + tmp &= 0xFF; + if ( tmp == 0 ) // If TH0 overflow set TF1 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x80 ); // TF1 = 1. + cpu8051_WriteD( _TH0_, tmp ); + } + break; + }; + + + // ----- Timer 1 + TR = cpu8051_ReadD( _TCON_ ) & 0x40; + MODE = ( cpu8051_ReadD( _TMOD_ ) & 0x30 ) >> 4 ; + GATE = cpu8051_ReadD( _TMOD_ ) & 0x80; + TimerCounter = cpu8051_ReadD( _TMOD_ ) & 0x40; + + if ( TR && !GATE && !TimerCounter ) + switch( MODE ) { + // Mode 0, compteur de 13 bits. + case 0 : + tmp = cpu8051_ReadD( _TH1_ ) * 0x100 + cpu8051_ReadD( _TL1_ ); + tmp++; + tmp &= 0x1FFF; // On ne garde que 13 bits. + if ( tmp == 0 ) // If overflow set TF1 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x80 ); + cpu8051_WriteD( _TH1_, tmp / 0x100 ); + cpu8051_WriteD( _TL1_, tmp & 0xFF ); + break; + + // Mode 1, compteur de 16 bits. + case 1 : + tmp = cpu8051_ReadD( _TH1_ ) * 0x100 + cpu8051_ReadD( _TL1_ ); + tmp++; + tmp &= 0xFFFF; // On ne garde que 16 bits. + if ( tmp == 0 ) // If overflow set TF1 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x80 ); + cpu8051_WriteD( _TH1_, ( tmp / 0x100 ) ); + cpu8051_WriteD( _TL1_, ( tmp & 0xFF ) ); + break; + + // Mode 2, Compteur de 8 bits avec Auto-Reload + case 2 : + tmp = cpu8051_ReadD( _TL1_ ); + tmp++; + tmp &= 0xFF; + if ( tmp == 0 ) { // If overflow -> reload et set TF1 + cpu8051_WriteD( _TCON_, cpu8051_ReadD( _TCON_ ) | 0x80 ); + cpu8051_WriteD( _TL1_, cpu8051_ReadD( _TH1_ ) ); + } + else + cpu8051_WriteD( _TL1_, tmp ); + break; + + // Mode 3 : mode inactif: retient la valeur de TH1 et TL1. + // Equivalent a TR1 = 0. + case 3 : + break; + + }; +} + + +// Addressing modes defined in the order as they appear in disasm.hpp +// from table argstext[] +#define ADDR11 0 +#define ADDR16 1 +#define DIRECT 3 +#define BITADDR 14 +#define RELADDR 15 +#define DATAIMM 16 +#define DATA16 22 +#define CBITADDR 23 + +// SFR Memory map [80h - FFh] +// --------------------------------------------------------------- +// F8 | | | | | | | | | FF +// F0 | B | | | | | | | | F7 +// E8 | | | | | | | | | EF +// E0 | ACC | | | | | | | | E7 +// D8 | | | | | | | | | DF +// D0 | PSW | | | | | | | | D7 +// C8 | T2CON| |RCAP2L|RCAP2H| TL2 | TH2 | | | CF +// C0 | | | | | | | | | C7 +// B8 | IP | | | | | | | | BF +// B0 | P3 | | | | | | | | B7 +// A8 | IE | | | | | | | | AF +// A0 | P2 | | | | | | | | A7 +// 98 | SCON | SBUF | | | | | | | 9F +// 90 | P1 | | | | | | | | 97 +// 88 | TCON | TMOD | TL0 | TL1 | TH0 | TH1 | | | 8F +// 80 | P0 | SP | DPL | DPH | | | | PCON | 87 +// --------------------------------------------------------------- + + +////////////////////////////////////////////////////////////////////////////// +// Return as Text the name of the SFR register at Address if any +////////////////////////////////////////////////////////////////////////////// +int +cpu8051_SFRMemInfo( unsigned int Address, char *Text ) +{ + switch( Address ) { + case 0x80 : return sprintf( Text, "P0" ); + case 0x81 : return sprintf( Text, "SP" ); + case 0x82 : return sprintf( Text, "DPL" ); + case 0x83 : return sprintf( Text, "DPH" ); + case 0x87 : return sprintf( Text, "PCON" ); + case 0x88 : return sprintf( Text, "TCON" ); + case 0x89 : return sprintf( Text, "TMOD" ); + case 0x8A : return sprintf( Text, "TL0" ); + case 0x8B : return sprintf( Text, "TL1" ); + case 0x8C : return sprintf( Text, "TH0" ); + case 0x8D : return sprintf( Text, "TH1" ); + case 0x90 : return sprintf( Text, "P1" ); + case 0x98 : return sprintf( Text, "SCON" ); + case 0x99 : return sprintf( Text, "SBUF" ); + case 0xA0 : return sprintf( Text, "P2" ); + case 0xA8 : return sprintf( Text, "IE" ); + case 0xB0 : return sprintf( Text, "P3" ); + case 0xB8 : return sprintf( Text, "IP" ); + case 0xC8 : return sprintf( Text, "T2CON" ); + case 0xCA : return sprintf( Text, "RCAP2L" ); + case 0xCB : return sprintf( Text, "RCAP2H" ); + case 0xCC : return sprintf( Text, "TL2" ); + case 0xCD : return sprintf( Text, "TH2" ); + case 0xD0 : return sprintf( Text, "PSW" ); + case 0xE0 : return sprintf( Text, "ACC" ); + case 0xF0 : return sprintf( Text, "B" ); + default : return sprintf( Text, "%.2XH", Address ); + } +} + + +////////////////////////////////////////////////////////////////////////////// +// Return as Text the decoded BitAddress +////////////////////////////////////////////////////////////////////////////// +void +cpu8051_IntMemBitInfo( unsigned int BitAddress, char *Text ) +{ + unsigned int ByteAddress, BitNumber; + int TextLength; + + if ( BitAddress > 0x7F ) { + // SFR 80-FF + ByteAddress = BitAddress & 0xF8; + BitNumber = BitAddress & 0x07; + } + else { + // 20-2F + ByteAddress = ( BitAddress >> 3 ) + 0x20; + BitNumber = BitAddress & 0x07; + } + + TextLength = cpu8051_SFRMemInfo( ByteAddress, Text ); + // sprintf( &Text[ TextLength ], ".%X" ); + // Modified by Hugo Villeneuve to remove compilation warning + sprintf( &Text[ TextLength ], ".%X", BitAddress ); +} + + +////////////////////////////////////////////////////////////////////////////// +// Disasm one instruction at Address into a Text string +////////////////////////////////////////////////////////////////////////////// +int +cpu8051_Disasm( unsigned int Address, char *Text ) +{ + int TextLength=0; + char TextTmp[20]; + unsigned char OpCode; + int ArgTblOfs; + int InstSize; + int i; + + OpCode = memory_read8( PGM_MEM_ID, Address ); + InstSize = InstSizesTbl[ OpCode ]; + //printf("%.4X\n", Address); + + TextLength += sprintf( Text, " %.4X ", Address ); + + for (i = 0; i < InstSize; i++ ) + TextLength += sprintf( &Text[TextLength], " %.2X", memory_read8( PGM_MEM_ID, Address + i ) ); + + Address++; + + for (; TextLength < 17; ) TextLength += sprintf( &Text[ TextLength ], " " ); + + TextLength += sprintf( &Text[ TextLength ], "%s ", InstTextTbl[ InstTypesTbl[ OpCode ] ] ); + ArgTblOfs = OpCode << 2; + + for (; TextLength < 25; ) TextLength += sprintf( &Text[ TextLength ], " " ); + + // MOV direct, direct (OpCode 85h) is peculiar, the operands are inverted + if ( OpCode == 0x85 ) { + cpu8051_SFRMemInfo( memory_read8( PGM_MEM_ID, Address + 1 ), TextTmp ); + TextLength += sprintf( &Text[ TextLength ], "%s,", TextTmp ); + cpu8051_SFRMemInfo( memory_read8( PGM_MEM_ID, Address ), TextTmp ); + TextLength += sprintf( &Text[ TextLength ], "%s", TextTmp ); + Address += 2; + return InstSize; + } + + for ( i = 1; i <= InstArgTbl[ ArgTblOfs ]; i++ ) { + switch( InstArgTbl[ ArgTblOfs + i ] ) { + case ADDR11 : { + TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( ( OpCode << 3) & 0xF00 ) + ( memory_read8( PGM_MEM_ID, Address ) ) ); + Address++; + break; + } + case ADDR16 : { + TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( ( memory_read8( PGM_MEM_ID, Address ) << 8 ) + memory_read8( PGM_MEM_ID, Address + 1 ) ) ); + Address += 2; + break; + } + case DIRECT : { + cpu8051_SFRMemInfo( memory_read8( PGM_MEM_ID, Address ), TextTmp ); + TextLength += sprintf( &Text[ TextLength ], "%s", TextTmp ); + Address++; + break; + } + case BITADDR : { + cpu8051_IntMemBitInfo( ( memory_read8( PGM_MEM_ID, Address ) & 0xF8 ), TextTmp ); + TextLength += sprintf( &Text[ TextLength ], "%s.%X" , TextTmp, ( memory_read8( PGM_MEM_ID, Address ) & 7 ) ); + Address++; + break; + } + case RELADDR : { + Address++; + TextLength += sprintf( &Text[ TextLength ], "%.4XH", ( Address & 0xFF00 ) + ( ( ( Address & 0xFF ) + memory_read8( PGM_MEM_ID, Address - 1 ) ) & 0xFF ) ); + break; + } + case DATAIMM : { + TextLength += sprintf( &Text[ TextLength ], "#%.2XH", memory_read8( PGM_MEM_ID, Address ) ); + Address++; + break; + } + case DATA16 : { + TextLength += sprintf( &Text[ TextLength ],"#%.4XH", ( ( memory_read8( PGM_MEM_ID, Address ) << 8 ) + memory_read8( PGM_MEM_ID, Address+1 ) ) ); + Address += 2; + break; + } + case CBITADDR : { + cpu8051_IntMemBitInfo( ( memory_read8( PGM_MEM_ID, Address ) & 0xF8 ), TextTmp ); + TextLength += sprintf( &Text[ TextLength ], "/%s.%X", TextTmp, ( memory_read8( PGM_MEM_ID, Address ) & 7 ) ); + Address++; + break; + } + default : { + TextLength += sprintf( &Text[ TextLength ],"%s", ArgsTextTbl[ InstArgTbl[ ArgTblOfs + i ] ] ); + } + } + if (i < InstArgTbl[ ArgTblOfs ]) { TextLength += sprintf( &Text[ TextLength ], "," ); } + } + + return InstSize; +} diff --git a/src/cpu8051.h b/src/cpu8051.h new file mode 100644 index 0000000..da58ac5 --- /dev/null +++ b/src/cpu8051.h @@ -0,0 +1,59 @@ +/* cpu8051.h */ + + +#ifndef CPU8051_H +#define CPU8051_H 1 + + +void +cpu8051_Exec( void ); + +void +cpu8051_Reset( void ); + +void +cpu8051_WriteD( unsigned int Address, unsigned char Value ); + +void +cpu8051_WriteInt( unsigned int Address, unsigned char Value ); + +void +cpu8051_WriteI( unsigned int Address, unsigned char Value ); + +unsigned char +cpu8051_ReadD( unsigned int Address ); + +unsigned char +cpu8051_ReadInt( unsigned int Address ); + + +unsigned char +cpu8051_ReadI( unsigned int Address ); + + +unsigned int +cpu8051_GetNextAddress( void ); + +void +cpu8051_WriteB( unsigned int BitAddress, unsigned char Value ); + +unsigned char +cpu8051_ReadB( unsigned int BitAddress ); + +void +cpu8051_CheckInterrupts( void ); + +void +cpu8051_DoTimers( void ); + +int +cpu8051_SFRMemInfo( unsigned int Address, char *Text ); + +void +cpu8051_IntMemBitInfo( unsigned int BitAddress, char *Text ); + +int +cpu8051_Disasm( unsigned int Address, char *Text ); + + +#endif /* CPU8051_H */ diff --git a/src/EmuGtk.cpp b/src/emugtk.c similarity index 60% rename from src/EmuGtk.cpp rename to src/emugtk.c index 74a6e66..3e8d6fb 100644 --- a/src/EmuGtk.cpp +++ b/src/emugtk.c @@ -1,30 +1,28 @@ -// EmuGtk.cpp +/* emugtk.c */ + -#include #include #include "config.h" -#include "CPU8051.hpp" -#include "EmuGtk.hpp" -#include "exceptions.hpp" + +#include +#include "emugtk.h" #include "reset.xpm" #include "run.xpm" #include "stop.xpm" #include "step.xpm" -extern "C" { +#include "cpu8051.h" #include "options.h" #include "file.h" -} +#include "regwin.h" +#include "pgmwin.h" +#include "memwin.h" -int EmuGtkNumber = 0; int NbSignals = 0; int SignalsData[ 32 ]; -EmuGtk *EmuGtkPtr; - -enum -{ +enum { DestroySignal=0, DeleteSignal, OpenISignal, @@ -37,39 +35,62 @@ enum }; -static void -cpu_write_pgm( unsigned int Address, unsigned char Value ) -{ - EmuGtkPtr->CPU->WritePGM( Address, Value ); -} +/* private */ +int EmuGtkID; +int RunningState; +int RunFuncTag; +GtkWidget *emuwin, *emufixed, *emumainfixed; +GtkWidget *regfrm, *pgmfrm, *memfrm; +GtkWidget *ButtonTable; + +GtkWidget *FileMenu, *OpenItem, *QuitItem, *FileItem; +GtkWidget *ViewMenu, *ExtMemItem, *IntMemItem, *ViewItem; + +GtkWidget *HelpMenu, *AboutItem, *LicenseItem, *HelpItem; +GtkWidget *MenuBar; + +// RESET button +GdkBitmap *RESET_mask; +GdkPixmap *RESET_pixmap; +GtkWidget *RESET_widget; +GtkWidget *ButtonReset; + +// RUN button +GdkBitmap *RUN_mask; +GdkPixmap *RUN_pixmap; +GtkWidget *RUN_widget; +GtkWidget *ButtonRun; + +// STOP button +GdkBitmap *STOP_mask; +GdkPixmap *STOP_pixmap; +GtkWidget *STOP_widget; +GtkWidget *ButtonStop; + +// STEP button +GdkBitmap *STEP_mask; +GdkPixmap *STEP_pixmap; +GtkWidget *STEP_widget; +GtkWidget *ButtonStep; + + + +#define EXIT_SUCCESS 0 -int main( int argc, char **argv ) -{ - CPU8051 *maincpu = new CPU8051; - EmuGtk *emuUI = new EmuGtk( argc, argv, maincpu ); - - emuUI->Main(); - printf( "End of program.\n" ); - - delete emuUI; - delete maincpu; - - return 0; -} + +/* in cpu8051.c */ +extern unsigned int PC; ////////////////////////////////////////////////////////////////////////////// -// EmuGtk::EmuGtk( ) // EmuGtk constructor ////////////////////////////////////////////////////////////////////////////// -EmuGtk::EmuGtk( int argc, char **argv, CPU8051 *mCPU ) +void +emugtk_init( int argc, char **argv ) { - CPU = mCPU; RunningState = 0; - ParseCommandLineOptions( argc, argv ); - g_print( "\n" ); gtk_init( &argc, &argv ); @@ -92,16 +113,16 @@ EmuGtk::EmuGtk( int argc, char **argv, CPU8051 *mCPU ) gtk_fixed_put( GTK_FIXED( emufixed ), emumainfixed, 0, 25 ); gtk_widget_show( emumainfixed ); - ShowMenu(); + emugtk_ShowMenu(); - AddButtons(); + emugtk_AddButtons(); // Registers frame regfrm = gtk_frame_new( 0 ); gtk_frame_set_shadow_type( GTK_FRAME( regfrm ), GTK_SHADOW_ETCHED_OUT ); gtk_widget_set_usize( GTK_WIDGET( regfrm ), REG_WIN_WIDTH, REG_WIN_HEIGHT ); gtk_fixed_put( GTK_FIXED( emumainfixed ), regfrm, 0, BUTTONS_BAR_HEIGHT ); - regwin = new RegWin( regfrm ); + regwin_init( regfrm ); gtk_widget_show( regfrm ); // Program disassembly frame @@ -109,7 +130,9 @@ EmuGtk::EmuGtk( int argc, char **argv, CPU8051 *mCPU ) gtk_frame_set_shadow_type( GTK_FRAME( pgmfrm ), GTK_SHADOW_ETCHED_OUT ); gtk_widget_set_usize( GTK_WIDGET( pgmfrm ), PGM_WIN_WIDTH, PGM_WIN_HEIGHT ); gtk_fixed_put( GTK_FIXED( emumainfixed ), pgmfrm, REG_WIN_WIDTH + 10, BUTTONS_BAR_HEIGHT ); - pgmwin = new PgmWin( pgmfrm, CPU ); + + pgmwin_init( pgmfrm ); + gtk_widget_show( pgmfrm ); // Memory dump frame @@ -117,100 +140,107 @@ EmuGtk::EmuGtk( int argc, char **argv, CPU8051 *mCPU ) gtk_frame_set_shadow_type( GTK_FRAME( memfrm ), GTK_SHADOW_ETCHED_OUT ); gtk_widget_set_usize( GTK_WIDGET( memfrm ), MEM_WIN_WIDTH, MEM_WIN_HEIGHT ); gtk_fixed_put( GTK_FIXED( emumainfixed ), memfrm, 0, REG_WIN_HEIGHT + BUTTONS_BAR_HEIGHT ); - memwin = new MemWin( memfrm ); + memwin_init( memfrm ); gtk_widget_show( memfrm ); - if ( EmuGtkNumber >= 1 ) - g_print( "WARNING! Signal too much EmuGtk Objects to handle signals!\n"); - else - { - EmuGtkPtr = this; - NbSignals = 0; - - // Window DESTROY signal - SignalsData[ NbSignals ] = DestroySignal; - gtk_signal_connect( GTK_OBJECT( emuwin ), "destroy", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); - NbSignals++; + NbSignals = 0; + + // Window DESTROY signal + SignalsData[ NbSignals ] = DestroySignal; + gtk_signal_connect( GTK_OBJECT( emuwin ), "destroy", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); + NbSignals++; - // Window DELETE event - SignalsData[ NbSignals ] = DeleteSignal; - gtk_signal_connect( GTK_OBJECT( emuwin ), "delete_event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // File->Open - SignalsData[ NbSignals ] = OpenISignal; - gtk_signal_connect( GTK_OBJECT( OpenItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // File->Quit - SignalsData[ NbSignals ] = QuitISignal; - gtk_signal_connect( GTK_OBJECT( QuitItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // Help->About - SignalsData[ NbSignals ] = AboutISignal; - gtk_signal_connect( GTK_OBJECT( AboutItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // RESET button - SignalsData[ NbSignals ] = ResetBSignal; - gtk_signal_connect( GTK_OBJECT( ButtonReset ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); - NbSignals++; + // Window DELETE event + SignalsData[ NbSignals ] = DeleteSignal; + gtk_signal_connect( GTK_OBJECT( emuwin ), "delete_event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // File->Open + SignalsData[ NbSignals ] = OpenISignal; + gtk_signal_connect( GTK_OBJECT( OpenItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // File->Quit + SignalsData[ NbSignals ] = QuitISignal; + gtk_signal_connect( GTK_OBJECT( QuitItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // Help->About + SignalsData[ NbSignals ] = AboutISignal; + gtk_signal_connect( GTK_OBJECT( AboutItem ), "activate", GTK_SIGNAL_FUNC( EmuGtkSignalStub2 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // RESET button + SignalsData[ NbSignals ] = ResetBSignal; + gtk_signal_connect( GTK_OBJECT( ButtonReset ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); + NbSignals++; - // RUN button - SignalsData[ NbSignals ] = RunBSignal; - gtk_signal_connect( GTK_OBJECT( ButtonRun ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // STOP button - SignalsData[ NbSignals ] = StopBSignal; - gtk_signal_connect( GTK_OBJECT( ButtonStop ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); - NbSignals++; - - // STEP button - SignalsData[ NbSignals ] = StepBSignal; - gtk_signal_connect( GTK_OBJECT( ButtonStep ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); - NbSignals++; + // RUN button + SignalsData[ NbSignals ] = RunBSignal; + gtk_signal_connect( GTK_OBJECT( ButtonRun ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // STOP button + SignalsData[ NbSignals ] = StopBSignal; + gtk_signal_connect( GTK_OBJECT( ButtonStop ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); + NbSignals++; + + // STEP button + SignalsData[ NbSignals ] = StepBSignal; + gtk_signal_connect( GTK_OBJECT( ButtonStep ), "button-press-event", GTK_SIGNAL_FUNC( EmuGtkSignalStub3 ), &SignalsData[ NbSignals ] ); + NbSignals++; - EmuGtkNumber++; - } if( GetHexFileName() != NULL ) { - LoadHexFile( GetHexFileName(), cpu_write_pgm ); + LoadHexFile( GetHexFileName() ); } } +int +main( int argc, char **argv ) +{ + ParseCommandLineOptions( argc, argv ); + + emugtk_init( argc, argv ); + + emugtk_Reset( ); + gtk_main(); + + printf( "End of program.\n" ); + + return EXIT_SUCCESS; +} + + ////////////////////////////////////////////////////////////////////////////// -// void AddButtons() // Create and show the Reset, Run, Stop, Trace and Step buttons ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::AddButtons( void ) +void +emugtk_AddButtons( void ) { - //GtkStyle *Style = gtk_widget_get_style( GTK_WIDGET( emuwin ) ); - RESET_pixmap = gdk_pixmap_colormap_create_from_xpm_d( NULL, - gtk_widget_get_default_colormap(), - &RESET_mask, - NULL, - ( gchar ** ) reset_xpm ); + gtk_widget_get_default_colormap(), + &RESET_mask, + NULL, + ( gchar ** ) reset_xpm ); RESET_widget = gtk_pixmap_new( RESET_pixmap, RESET_mask ); - + RUN_pixmap = gdk_pixmap_colormap_create_from_xpm_d( NULL, gtk_widget_get_default_colormap(), &RUN_mask, NULL, ( gchar ** ) run_xpm ); RUN_widget = gtk_pixmap_new( RUN_pixmap, RUN_mask ); - + STOP_pixmap = gdk_pixmap_colormap_create_from_xpm_d( NULL, gtk_widget_get_default_colormap(), &STOP_mask, NULL, ( gchar ** ) stop_xpm ); STOP_widget = gtk_pixmap_new( STOP_pixmap, STOP_mask ); - + STEP_pixmap = gdk_pixmap_colormap_create_from_xpm_d( NULL, gtk_widget_get_default_colormap(), &STEP_mask, @@ -232,7 +262,6 @@ void EmuGtk::AddButtons( void ) gtk_container_add( GTK_CONTAINER( ButtonStop ), STOP_widget ); gtk_container_add( GTK_CONTAINER( ButtonStep ), STEP_widget ); - gtk_widget_set_usize( GTK_WIDGET( ButtonReset ), BUTTON_WIDTH, BUTTON_HEIGHT ); gtk_widget_set_usize( GTK_WIDGET( ButtonRun ), BUTTON_WIDTH, BUTTON_HEIGHT ); gtk_widget_set_usize( GTK_WIDGET( ButtonStop ), BUTTON_WIDTH, BUTTON_HEIGHT ); @@ -251,56 +280,39 @@ void EmuGtk::AddButtons( void ) gtk_widget_show_all( GTK_WIDGET( ButtonTable ) ); } -////////////////////////////////////////////////////////////////////////////// -// EmuGtk::~EmuGtk( ) -// EmuGtk destructor -////////////////////////////////////////////////////////////////////////////// -EmuGtk::~EmuGtk( ) -{ - g_print( "EmuGtk::~EmuGtk( )\n" ); -} ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::Reset( ) // CPU reset and Gtk UI update ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::Reset( ) +void +emugtk_Reset( void ) { - CPU->Reset( ); - regwin->Show( CPU ); - pgmwin->Disasm( ); - memwin->DumpD( CPU, 0 ); + cpu8051_Reset( ); + regwin_Show(); + pgmwin_Disasm(); + memwin_DumpD( 0 ); } + ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::Step( ) // CPU Step and Gtk UI update ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::Step( ) +void +emugtk_Step( void ) { - CPU->Exec( ); - regwin->Show( CPU ); - pgmwin->Disasm( ); - memwin->DumpD( CPU, 0 ); + cpu8051_Exec(); + regwin_Show(); + pgmwin_Disasm(); + memwin_DumpD( 0 ); } -////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::Main( ) -// Gtk UI Main function -////////////////////////////////////////////////////////////////////////////// -void EmuGtk::Main( ) -{ - Reset( ); - gtk_main(); - g_print( "End of EmuGtk::Main( )\n" ); -} ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::ShowMenu( ) // Show the menu ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::ShowMenu( ) +void +emugtk_ShowMenu( void ) { FileMenu = gtk_menu_new( ); OpenItem = gtk_menu_item_new_with_label( "Open" ); @@ -344,38 +356,44 @@ void EmuGtk::ShowMenu( ) gtk_menu_bar_append( GTK_MENU_BAR( MenuBar ), HelpItem ); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::DeleteEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal DeleteEvent ////////////////////////////////////////////////////////////////////////////// -gboolean EmuGtk::DeleteEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +gboolean +emugtk_DeleteEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { - g_print( "EmuGtk::DeleteEvent(...)\n" ); - StopRunning( ); + g_print( "emugtk_DeleteEvent(...)\n" ); + emugtk_StopRunning( ); return FALSE; } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::DestroyEvent( GtkWidget *widget, gpointer data ) // Signal DestroyEvent ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::DestroyEvent( GtkWidget *widget, gpointer data ) +void +emugtk_DestroyEvent( GtkWidget *widget, gpointer data ) { - g_print( "EmuGtk::DestroyEvent(...)\n" ); + g_print( "emugtk_DestroyEvent(...)\n" ); gtk_main_quit(); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::AboutEvent( GtkWidget *widget, gpointer data ) +// gint emugtk_AboutEvent( GtkWidget *widget, gpointer data ) // Signal AboutEvent ( Help->About in menu ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::AboutEvent( GtkWidget *widget, gpointer data ) +void +emugtk_AboutEvent( GtkWidget *widget, gpointer data ) { char about_string[256]; GtkWidget *about_window; GtkWidget *text_window; - sprintf( about_string, "%s\n\nversion %s\n\n\nAuthors:\nHugo Villeneuve\nJonathan St-André\n", PACKAGE, VERSION ); + sprintf( about_string, + "%s\n\nversion %s\n\n\nAuthors:\nHugo Villeneuve\nJonathan St-André\n", + PACKAGE, VERSION ); about_window = gtk_window_new( GTK_WINDOW_TOPLEVEL ); gtk_window_set_title( GTK_WINDOW( about_window ), "About" ); @@ -387,15 +405,16 @@ void EmuGtk::AboutEvent( GtkWidget *widget, gpointer data ) gtk_widget_show_all( GTK_WIDGET( about_window ) ); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::OpenEvent( GtkWidget *widget, gpointer data ) // Signal OpenEvent ( File->Open in menu ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::OpenEvent( GtkWidget *widget, gpointer data ) +void +emugtk_OpenEvent( GtkWidget *widget, gpointer data ) { GtkWidget *FileOpendialog; - // g_print( "EmuGtk::OpenEvent(...)\n" ); + // g_print( "emugtk_OpenEvent(...)\n" ); FileOpendialog = gtk_file_selection_new( "Open Intel Hex file" ); @@ -418,225 +437,238 @@ void EmuGtk::OpenEvent( GtkWidget *widget, gpointer data ) gtk_widget_show( GTK_WIDGET( FileOpendialog ) ); } -////////////////////////////////////////////////////////////////////////////// -////////////////////////////////////////////////////////////////////////////// -void FileOpenDialog_OK( GtkButton *button, gpointer data ) + +void +FileOpenDialog_OK( GtkButton *button, gpointer data ) { - g_print( "EmuGtk::FileOpenDialog_OK Event(...)\n" ); + g_print( "emugtk_FileOpenDialog_OK Event(...)\n" ); const gchar *SelectedFile; - SelectedFile = (const gchar *) gtk_file_selection_get_filename ( GTK_FILE_SELECTION ( data ) ); + SelectedFile = (const gchar *) gtk_file_selection_get_filename( GTK_FILE_SELECTION( data ) ); - g_print( "EmuGtk::File = %s\n", SelectedFile ); + g_print( "emugtk_File = %s\n", SelectedFile ); - EmuGtkPtr->StopRunning( ); + emugtk_StopRunning(); - LoadHexFile( SelectedFile, cpu_write_pgm ); + LoadHexFile( SelectedFile ); gtk_widget_destroy( GTK_WIDGET( data ) ); - EmuGtkPtr->Reset( ); - EmuGtkPtr->UpdateDisplay(); + emugtk_Reset(); + emugtk_UpdateDisplay(); } -void EmuGtk::UpdateDisplay( void ) +void +emugtk_UpdateDisplay( void ) { - regwin->Show( CPU ); - pgmwin->Disasm( ); - memwin->DumpD( CPU, 0 ); + g_print( "emugtk_UpdateDisplay()\n" ); + + regwin_Show(); + pgmwin_Disasm(); + memwin_DumpD( 0 ); } -////////////////////////////////////////////////////////////////////////////// -////////////////////////////////////////////////////////////////////////////// -void FileOpenDialog_CANCEL( GtkButton *button, gpointer data ) +void +FileOpenDialog_CANCEL( GtkButton *button, gpointer data ) { - g_print( "EmuGtk::FileOpenDialog_CANCEL Event(...)\n" ); - + g_print( "emugtk_FileOpenDialog_CANCEL Event(...)\n" ); + gtk_widget_destroy( GTK_WIDGET( data ) ); } - ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::QuitEvent( GtkWidget *widget, gpointer data ) // Signal QuitEvent ( File->Quit in menu ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::QuitEvent( GtkWidget *widget, gpointer data ) +void +emugtk_QuitEvent( GtkWidget *widget, gpointer data ) { - g_print( "EmuGtk::QuitEvent(...)\n" ); - StopRunning( ); + g_print( "emugtk_QuitEvent(...)\n" ); + emugtk_StopRunning( ); gtk_main_quit( ); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::ResetEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal ResetEvent ( ResetButton ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::ResetEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +void +emugtk_ResetEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { - g_print( "EmuGtk::ResetEvent(...)\n" ); - StopRunning( ); - Reset( ); + g_print( "emugtk_ResetEvent(...)\n" ); + emugtk_StopRunning( ); + emugtk_Reset( ); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::RunEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal RunEvent ( RunButton ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::RunEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +void +emugtk_RunEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { - g_print( "EmuGtk::RunEvent(...)\n" ); + g_print( "emugtk_RunEvent(...)\n" ); if ( RunningState ) { // g_print( "Getting out of RunningState! \n" ); - StopRunning( ); + emugtk_StopRunning( ); } else { // g_print( "Going In RunningState! \n" ); - StartRunning( ); + emugtk_StartRunning( ); } } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::StopEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal StopEvent ( StopButton ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::StopEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +void +emugtk_StopEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { - g_print( "EmuGtk::StopEvent(...)\n" ); - StopRunning( ); + g_print( "emugtk_StopEvent(...)\n" ); + emugtk_StopRunning( ); } + ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtk::StepEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal StepEvent ( StepButton ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::StepEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +void +emugtk_StepEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { - g_print( "EmuGtk::StepEvent(...)\n" ); - StopRunning( ); - Step( ); + g_print( "emugtk_StepEvent(...)\n" ); + emugtk_StopRunning( ); + emugtk_Step(); } ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtkSignalStub2( GtkWidget *widget, gpointer data ) // Signal Stub with 2 parameters ////////////////////////////////////////////////////////////////////////////// -void EmuGtkSignalStub2( GtkWidget *widget, gpointer data ) +void +EmuGtkSignalStub2( GtkWidget *widget, gpointer data ) { - //g_print( "EmuGtkSignalStub2(...)\n"); - int SigNumber = (* ( static_cast< int * >( data ) ) ); - - switch( SigNumber ) - { - case DestroySignal: - EmuGtkPtr->DestroyEvent( widget, 0 ); - break; - case AboutISignal: - EmuGtkPtr->AboutEvent( widget, 0 ); - break; - case OpenISignal: - EmuGtkPtr->OpenEvent( widget, 0 ); - break; - case QuitISignal: - EmuGtkPtr->QuitEvent( widget, 0 ); - break; - default: - g_print( "*** error: EmuGtkSignalStub2: default case reached\n" ); - break; - }; + g_print( "EmuGtkSignalStub2(...)\n"); + + int SigNumber = *( (int *) data ); + + switch( SigNumber ) { + case DestroySignal: + emugtk_DestroyEvent( widget, 0 ); + break; + case AboutISignal: + emugtk_AboutEvent( widget, 0 ); + break; + case OpenISignal: + emugtk_OpenEvent( widget, 0 ); + break; + case QuitISignal: + emugtk_QuitEvent( widget, 0 ); + break; + default: + g_print( "*** error: EmuGtkSignalStub2: default case reached\n" ); + break; + }; } ////////////////////////////////////////////////////////////////////////////// -// gint EmuGtkSignalStub3( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal Stub with 3 parameters ////////////////////////////////////////////////////////////////////////////// void EmuGtkSignalStub3( GtkWidget *widget, GdkEvent *event, gpointer data ) { - //g_print( "EmuGtkSignalStub3(...)\n"); - int SigNumber = (* ( static_cast< int * >( data ) ) ); + g_print( "EmuGtkSignalStub3(...)\n"); + + int SigNumber = *( (int *) data ); - switch( SigNumber ) - { - case DeleteSignal: - EmuGtkPtr->DeleteEvent( widget, event, 0 ); - break; - case ResetBSignal: - EmuGtkPtr->ResetEvent( widget, event, 0 ); - break; - case RunBSignal: - EmuGtkPtr->RunEvent( widget, event, 0 ); - break; - case StopBSignal: - EmuGtkPtr->StopEvent( widget, event, 0 ); - break; - case StepBSignal: - EmuGtkPtr->StepEvent( widget, event, 0 ); - break; - default: - g_print( "*** error: EmuGtkSignalStub3: default case reached\n" ); - break; - }; + switch( SigNumber ) { + case DeleteSignal: + emugtk_DeleteEvent( widget, event, 0 ); + break; + case ResetBSignal: + emugtk_ResetEvent( widget, event, 0 ); + break; + case RunBSignal: + emugtk_RunEvent( widget, event, 0 ); + break; + case StopBSignal: + emugtk_StopEvent( widget, event, 0 ); + break; + case StepBSignal: + emugtk_StepEvent( widget, event, 0 ); + break; + default: + g_print( "*** error: EmuGtkSignalStub3: default case reached\n" ); + break; + }; } + ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::Running( ) // Running called by RunningFunction( ) ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::Running( ) +void +emugtk_Running( ) { - CPU->Exec( ); - if ( pgmwin->IsBreakpoint( CPU->GetPC( ) ) ) { + cpu8051_Exec( ); + if( pgmwin_IsBreakpoint( PC ) ) { g_print( "Breakpoint Hit, stopping!\n" ); - StopRunning( ); + emugtk_StopRunning( ); } } + ////////////////////////////////////////////////////////////////////////////// -// gint RunningFunction( ) // RunningFunction called when idle from gtk_main ////////////////////////////////////////////////////////////////////////////// -gint RunningFunction( ) +gboolean +RunningFunction( gpointer data ) { - EmuGtkPtr->Running( ); + emugtk_Running( ); return TRUE; } + ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::StartRunning( ) // Get in the RunningState ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::StartRunning( ) +void +emugtk_StartRunning( void ) { if ( !RunningState ) { - printf( "EmuGtk::StartRunning( )\n" ); - RunFuncTag = gtk_idle_add( GtkFunction( RunningFunction ),0 ); + + printf( "emugtk_StartRunning( )\n" ); + + /*RunFuncTag = gtk_idle_add( GtkFunction( RunningFunction ), 0 );*/ + RunFuncTag = gtk_idle_add( RunningFunction, 0 ); + RunningState = 1; + // gtk_widget_hide( GTK_WIDGET( ButtonRun ) ); // gtk_widget_show_now( GTK_WIDGET( ButtonStop ) ); // gtk_table_attach_defaults( GTK_TABLE( ButtonTable ), ButtonStop, 3, 4, 0, 1); } } + ////////////////////////////////////////////////////////////////////////////// -// void EmuGtk::StopRunning( ) // Step out of RunningState ////////////////////////////////////////////////////////////////////////////// -void EmuGtk::StopRunning( ) +void +emugtk_StopRunning( ) { if (RunningState) { - printf( "EmuGtk::StopRunning( )\n" ); + printf( "emugtk_StopRunning( )\n" ); gtk_idle_remove( RunFuncTag ); RunningState = 0; //gtk_widget_hide( GTK_WIDGET( ButtonStop ) ); //gtk_widget_show( GTK_WIDGET( ButtonRun ) ); // gtk_table_attach_defaults( GTK_TABLE( ButtonTable ), ButtonRun, 3, 4, 0, 1); - regwin->Show( CPU ); - pgmwin->Disasm( ); - memwin->DumpD( CPU, 0 ); + regwin_Show(); + pgmwin_Disasm(); + memwin_DumpD( 0 ); } } diff --git a/src/emugtk.h b/src/emugtk.h new file mode 100644 index 0000000..fc5bda2 --- /dev/null +++ b/src/emugtk.h @@ -0,0 +1,52 @@ +/* emugtk.h */ + + +#ifndef EMUGTK_H +#define EMUGTK_H 1 + + +#include +#include "gtksizes.h" +/*#include "exceptions.hpp"*/ + + +void emugtk_Reset( ); +void emugtk_Step( ); +// void Step( ); +// void Exec( ); + +void emugtk_AddButtons( ); +void emugtk_ShowMenu( ); + +gboolean emugtk_DeleteEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); +void emugtk_DestroyEvent( GtkWidget *widget, gpointer data ); + +void emugtk_OpenEvent( GtkWidget *widget, gpointer data ); +void emugtk_QuitEvent( GtkWidget *widget, gpointer data ); +void emugtk_AboutEvent( GtkWidget *widget, gpointer data ); + +void emugtk_ResetEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); +void emugtk_RunEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); +void emugtk_StopEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); +void emugtk_StepEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); + +void emugtk_StartRunning( ); +void emugtk_StopRunning( ); +void emugtk_Running( ); + +void emugtk_UpdateDisplay(); + + + + + + + + +void EmuGtkSignalStub3( GtkWidget *widget, GdkEvent *event, gpointer data ); +void EmuGtkSignalStub2( GtkWidget *widget, gpointer data ); +void FileOpenDialog_OK( GtkButton *button, gpointer data ); +void FileOpenDialog_CANCEL( GtkButton *button, gpointer data ); + + +#endif /* EMUGTK_H */ diff --git a/src/file.c b/src/file.c index 90d99d5..51ad33e 100644 --- a/src/file.c +++ b/src/file.c @@ -17,6 +17,7 @@ #endif #include "common.h" +#include "memory.h" /* Convert an ascii string to an hexadecimal number. */ @@ -53,7 +54,7 @@ Ascii2Hex( char *istring, int length ) void -LoadHexFile( const char *filename, void (* cpu_write_pgm)( unsigned int Address, unsigned char Value ) ) +LoadHexFile( const char *filename ) { int i, j, RecLength, LoadOffset, RecType, Data, Checksum; @@ -114,7 +115,7 @@ LoadHexFile( const char *filename, void (* cpu_write_pgm)( unsigned int Address, for ( j = 0; j < RecLength; j++ ) { Data = Ascii2Hex( &line[ i ], 2 ); - (*cpu_write_pgm)( (unsigned int)(LoadOffset + j), (unsigned char)Data ); + memory_write8( PGM_MEM_ID, (unsigned int)(LoadOffset + j), (unsigned char)Data ); i += 2; Checksum += Data; } diff --git a/src/file.h b/src/file.h index d163725..10d7d92 100644 --- a/src/file.h +++ b/src/file.h @@ -1,11 +1,12 @@ /* file.h */ + #ifndef FILE_H #define FILE_H 1 void -LoadHexFile( const char *filename, void (* cpu_write_pgm)( unsigned int Address, unsigned char Value ) ); +LoadHexFile( const char *filename ); #endif /* FILE_H */ diff --git a/src/GtkSizes.hpp b/src/gtksizes.h similarity index 100% rename from src/GtkSizes.hpp rename to src/gtksizes.h diff --git a/src/memory.c b/src/memory.c new file mode 100644 index 0000000..6c854c2 --- /dev/null +++ b/src/memory.c @@ -0,0 +1,103 @@ +/* memory.c */ + + +#include "memory.h" + + +#define SFR_MEM_SIZE 128 +#define PGM_MEM_SIZE 65536 +#define INT_MEM_SIZE 128 +#define EXT_MEM_SIZE 65536 + + +u_int8_t sfr_mem[SFR_MEM_SIZE]; +u_int8_t pgm_mem[PGM_MEM_SIZE]; +u_int8_t int_mem[INT_MEM_SIZE]; +u_int8_t ext_mem[EXT_MEM_SIZE]; + + +void +memory_write8( int memory_id, unsigned long address, u_int8_t value ) +{ + switch( memory_id ) { + case SFR_MEM_ID: + if( address >= SFR_MEM_SIZE ) { + return; + } + else { + sfr_mem[address] = value; + } + break; + case PGM_MEM_ID: + if( address >= PGM_MEM_SIZE ) { + return; + } + else { + pgm_mem[address] = value; + } + break; + case INT_MEM_ID: + if( address >= INT_MEM_SIZE ) { + return; + } + else { + int_mem[address] = value; + } + break; + case EXT_MEM_ID: + if( address >= EXT_MEM_SIZE ) { + return; + } + else { + ext_mem[address] = value; + } + break; + default: + /* Error. */ + break; + } +} + + +u_int8_t +memory_read8( int memory_id, unsigned long address ) +{ + switch( memory_id ) { + case SFR_MEM_ID: + if( address < SFR_MEM_SIZE ) { + return sfr_mem[address]; + } + else { + return 0; + } + break; + case PGM_MEM_ID: + if( address < PGM_MEM_SIZE ) { + return pgm_mem[address]; + } + else { + return 0; + } + break; + case INT_MEM_ID: + if( address < INT_MEM_SIZE ) { + return int_mem[address]; + } + else { + return 0; + } + break; + case EXT_MEM_ID: + if( address < EXT_MEM_SIZE ) { + return ext_mem[address]; + } + else { + return 0; + } + break; + default: + /* Error. */ + return 0; + break; + } +} diff --git a/src/memory.h b/src/memory.h new file mode 100644 index 0000000..039fb3f --- /dev/null +++ b/src/memory.h @@ -0,0 +1,26 @@ +/* memory.h */ + + +#ifndef MEMORY_H +#define MEMORY_H 1 + + +#include + + +enum { + SFR_MEM_ID, + PGM_MEM_ID, + INT_MEM_ID, + EXT_MEM_ID +}; + + +void +memory_write8( int memory_id, unsigned long address, u_int8_t value ); + +u_int8_t +memory_read8( int memory_id, unsigned long address ); + + +#endif /* MEMORY_H */ diff --git a/src/MemWin.cpp b/src/memwin.c similarity index 58% rename from src/MemWin.cpp rename to src/memwin.c index 26bd464..3e8b41d 100644 --- a/src/MemWin.cpp +++ b/src/memwin.c @@ -1,19 +1,25 @@ -/* memwin.cpp */ +/* memwin.c */ #if HAVE_CONFIG_H # include "config.h" #endif -#include "MemWin.hpp" #include +#include "cpu8051.h" +#include "memwin.h" + + +/*static GtkWidget *memwin;*/ +static GtkWidget *memclist; + ////////////////////////////////////////////////////////////////////////////// -// MemWin::MemWin( GtkWidget *parentwin ) // MemWin constructor ////////////////////////////////////////////////////////////////////////////// -MemWin::MemWin( GtkWidget *parentwin ) +void +memwin_init( GtkWidget *parentwin ) { int i; GtkStyle *style; @@ -49,19 +55,10 @@ MemWin::MemWin( GtkWidget *parentwin ) ////////////////////////////////////////////////////////////////////////////// -// MemWin::~MemWin( ) -// MemWin destructor -////////////////////////////////////////////////////////////////////////////// -MemWin::~MemWin( ) -{ - -} - -////////////////////////////////////////////////////////////////////////////// -// void MemWin::DumpD( CPU8051 *mCPU, unsigned int Address ) // Dump 16 rows of 16 bytes from Address in Memory (direct addressing) ////////////////////////////////////////////////////////////////////////////// -void MemWin::DumpD( CPU8051 *mCPU, unsigned int Address) +void +memwin_DumpD( unsigned int Address ) { char TextTmp[255]; int row, column, TextLength; @@ -72,14 +69,14 @@ gtk_clist_freeze( GTK_CLIST( memclist ) ); gtk_clist_set_text( GTK_CLIST( memclist ), row, 0, TextTmp ); for ( column = 0; column < 16; column++ ) { - sprintf( TextTmp, "%.2X", ( int ) mCPU->ReadD( Address + column ) ); + sprintf( TextTmp, "%.2X", ( int ) cpu8051_ReadD( Address + column ) ); gtk_clist_set_text( GTK_CLIST( memclist ), row, column + 1, TextTmp ); } TextLength = 0; for ( column = 0; column < 16; column++ ) { - if ( ( ( int ) mCPU->ReadD( Address + column ) >= 32 ) && ( ( int ) mCPU->ReadD( Address + column ) <= 126 ) ) - TextLength += sprintf( &TextTmp[ TextLength ], "%c", mCPU->ReadD( Address + column ) ); + if ( ( ( int ) cpu8051_ReadD( Address + column ) >= 32 ) && ( ( int ) cpu8051_ReadD( Address + column ) <= 126 ) ) + TextLength += sprintf( &TextTmp[ TextLength ], "%c", cpu8051_ReadD( Address + column ) ); else TextLength += sprintf( &TextTmp[ TextLength ], "." ); } gtk_clist_set_text( GTK_CLIST( memclist ), row, 17, TextTmp ); @@ -91,38 +88,35 @@ gtk_clist_select_row( GTK_CLIST( memclist ), 0, 0 ); gtk_clist_thaw( GTK_CLIST( memclist ) ); } + ////////////////////////////////////////////////////////////////////////////// -// void MemWin::DumpI( CPU8051 *mCPU, unsigned int Address ) // Dump 16 rows of 16 bytes from Address in Memory (indirect addressing) ////////////////////////////////////////////////////////////////////////////// -void MemWin::DumpI( CPU8051 *mCPU, unsigned int Address) +void +memwin_DumpI( unsigned int Address ) { -char TextTmp[255]; -int row, column, TextLength; - -gtk_clist_freeze( GTK_CLIST( memclist ) ); - for ( row = 0; row < 16; row++ ) { - sprintf( TextTmp, "%.4X", Address ); - gtk_clist_set_text( GTK_CLIST( memclist ), row, 0, TextTmp ); - - for ( column = 0; column < 16; column++ ) { - sprintf( TextTmp, "%.2X", ( int ) mCPU->ReadI( Address + column ) ); - gtk_clist_set_text( GTK_CLIST( memclist ), row, column + 1, TextTmp ); - } - - TextLength = 0; - for ( column = 0; column < 16; column++ ) { - if ( ( ( int ) mCPU->ReadI( Address + column ) >= 32 ) && ( ( int ) mCPU->ReadI( Address + column ) <= 126 ) ) - TextLength += sprintf( &TextTmp[ TextLength ], "%c", mCPU->ReadI( Address + column ) ); - else TextLength += sprintf( &TextTmp[ TextLength ], "." ); - } - gtk_clist_set_text( GTK_CLIST( memclist ), row, 17, TextTmp ); - - Address += 16; - } -gtk_clist_thaw( GTK_CLIST( memclist ) ); + char TextTmp[255]; + int row, column, TextLength; + + gtk_clist_freeze( GTK_CLIST( memclist ) ); + for ( row = 0; row < 16; row++ ) { + sprintf( TextTmp, "%.4X", Address ); + gtk_clist_set_text( GTK_CLIST( memclist ), row, 0, TextTmp ); + + for ( column = 0; column < 16; column++ ) { + sprintf( TextTmp, "%.2X", ( int ) cpu8051_ReadI( Address + column ) ); + gtk_clist_set_text( GTK_CLIST( memclist ), row, column + 1, TextTmp ); + } + + TextLength = 0; + for ( column = 0; column < 16; column++ ) { + if ( ( ( int ) cpu8051_ReadI( Address + column ) >= 32 ) && ( ( int ) cpu8051_ReadI( Address + column ) <= 126 ) ) + TextLength += sprintf( &TextTmp[ TextLength ], "%c", cpu8051_ReadI( Address + column ) ); + else TextLength += sprintf( &TextTmp[ TextLength ], "." ); + } + gtk_clist_set_text( GTK_CLIST( memclist ), row, 17, TextTmp ); + + Address += 16; + } + gtk_clist_thaw( GTK_CLIST( memclist ) ); } - - - - diff --git a/src/memwin.h b/src/memwin.h new file mode 100644 index 0000000..ce3f1f1 --- /dev/null +++ b/src/memwin.h @@ -0,0 +1,21 @@ +/* memwin.h */ + + +#ifndef MEMWIN_H +#define MEMWIN_H 1 + + +#include + + +void +memwin_init( GtkWidget *parentwin ); + +void +memwin_DumpD( unsigned int Address ); + +void +memwin_DumpI( unsigned int Address ); + + +#endif /* MEMWIN_H */ diff --git a/src/opcode2c.pl b/src/opcode2c.pl new file mode 100755 index 0000000..98483a7 --- /dev/null +++ b/src/opcode2c.pl @@ -0,0 +1,807 @@ +#!/usr/bin/perl + + +open INST_DEF, ">instructions_8051.h" or die "Error creating : $!\n"; +open INST_IMP, ">instructions_8051.c" or die "Error creating : $!\n"; +open OPCODELST, "opcodes.lst" or die "Error opening : $!\n"; +open DISASM_H, ">disasm.h" or die "Error creating : $!\n"; + +print INST_IMP "/* instructions_8051.c */\n\n\n"; +print INST_IMP "/* Do not modify this file directly, as it was created by opcode2c.pl\n"; +print INST_IMP " * Any modifications made directly to this file will be lost. */\n\n\n"; +print INST_IMP "/* Define only here, for not having extern scope on local variables. */\n"; +print INST_IMP "#define INSTRUCTIONS_8051_M 1\n\n\n"; +print INST_IMP "#include \"reg8051.h\"\n"; +print INST_IMP "#include \"cpu8051.h\"\n"; +print INST_IMP "#include \"memory.h\"\n"; +print INST_IMP "#include \"instructions_8051.h\"\n\n\n"; +print INST_IMP "extern int ActivePriority;\n"; +print INST_IMP "extern unsigned int PC;\n\n\n"; + +print DISASM_H "/* disasm.h */\n\n\n"; +print DISASM_H "/* Do not modify this file directly, as it was created by opcode2c.pl\n"; +print DISASM_H " * Any modifications made directly to this file will be lost. */\n\n\n"; +print DISASM_H "#ifndef DISASM_H\n"; +print DISASM_H "#define DISASM_H 1\n\n\n"; + + +$nbinst=0; +$nbaddr=0; +$nbargs=0; +$instnumb=0; + +$ligne=; +$ligne=; +while($ligne=) { + chop $ligne; + if (length $ligne < 2) {next;} + @wordlist=split ' ',$ligne; + $nbword=@wordlist; + $instruction=$wordlist[2]; + for($i=3;$i<($nbword-2);$i++) {$instruction="$instruction $wordlist[$i]";} + + $a_instruction[$instnumb]=$instruction; + $a_bytes[$instnumb]=$wordlist[$nbword-2]; + $a_cycles[$instnumb]=$wordlist[$nbword-1]; + $a_opcodehex[$instnumb]=$wordlist[1]; + $a_opcodebin[$instnumb]=$wordlist[0]; + + $instfunction[$instnumb]="CPU8051::OP_$wordlist[1]"; + + $instargs[$instnumb << 2]=$instargs[($instnumb << 2) + 1]=$instargs[($instnumb << 2) + 2]=$instargs[($instnumb << 2) + 3]=0; + if ($nbword > 5) { + @argslist=split /\,/,$wordlist[3]; + $argslistsize=@argslist; + $instargs[$instnumb << 2]=$argslistsize; + for ($i=0;$i<$argslistsize;$i++) { + if (not exists $argstypes{$argslist[$i]}) { + $argstypes[$nbargs]=$argslist[$i]; + $argstypes{$argslist[$i]}=$nbargs++; + } + $instargs[($instnumb << 2) + $i + 1]=$argstypes{$argslist[$i]}; + } + } + + if (not exists $insttext{$wordlist[2]}) { + $insttext[$nbinst]=$wordlist[2]; + $insttext{$wordlist[2]}=$nbinst++; + } + + $insttype[$instnumb]=$insttext{$wordlist[2]}; + + if ( not exists $addrmode{$wordlist[3]}) { + $addrmode[$nbaddr]=$wordlist[3]; + $addrmode{$wordlist[3]}=$nbaddr++; + } + + $nbbytes[$instnumb]=$wordlist[$nbword-2]; + + $instaddr[$instnumb]=$addrmode{$wordlist[3]}; + + $instnumb++; +} +# ------------------------------------------------------------------------------ +print DISASM_H "// For all 256 opcodes, the value in this table gives the instruction type\n"; +print DISASM_H "// ex.: MOV, INC, CLR, CPL,...\n"; +print DISASM_H "// To know what is the instruction type, use the number as an offset in the InstTextTbl[]\n"; +print DISASM_H "static int InstTypesTbl[] = {\n"; +for($i=0;$i<256;$i++) { + print DISASM_H " $insttype[$i]"; + ($i != 255) and print DISASM_H ","; + if (($i+1) % 16 == 0) { print DISASM_H "\n"; } +} +print DISASM_H "};\n"; +print DISASM_H "\n\n"; +# ------------------------------------------------------------------------------ +print DISASM_H "// Size(in bytes) of each instruction (offset in table is instruction opcode)\n"; +print DISASM_H "static int InstSizesTbl[] = {\n"; +for($i=0;$i<256;$i++) { + print DISASM_H " $nbbytes[$i]"; + ($i != 255) and print DISASM_H ","; + if (($i+1) % 16 == 0) { print DISASM_H "\n"; } +} +print DISASM_H "};\n"; +print DISASM_H "\n\n"; +# ------------------------------------------------------------------------------ +print DISASM_H "// List of instructions types referenced by InstTypesTbl[]\n"; +$nbelement=@insttext; +print DISASM_H "\#define InstTextTblLength $nbelement\n"; +$elementnb=0; +print DISASM_H "static char *InstTextTbl[] = {\n"; +foreach $instruc (@insttext) { + print DISASM_H " \"$instruc\""; + ($elementnb++ < $nbelement-1) and print DISASM_H ","; + print DISASM_H "\n"; +} +print DISASM_H "};\n"; +print DISASM_H "\n\n"; +# ------------------------------------------------------------------------------ +print DISASM_H "// Table describing all arguments types of an instruction\n"; +print DISASM_H "// The table is indexed InstArgTbl[ opcode * 4]\n"; +print DISASM_H "// InstArgTbl[opcode*4 + 1] gives the number of arguments the instruction has\n"; +print DISASM_H "// InstArgTbl[opcode*4 + i] for i=1,2 and 3 give the type of each argument\n"; +print DISASM_H "// for most instructions, the 3rd argument isn't used\n"; +print DISASM_H "// the argument type is referecing to ArgsTextTbl[]\n"; +print DISASM_H "\#define InstArgTblLength 256\n"; +print DISASM_H "static int InstArgTbl[] = {\n"; +for($i=0;$i<1024;$i++) { + print DISASM_H " $instargs[$i]"; + ($i != 1023) and print DISASM_H ","; + if (($i+1) % 16 == 0) { print DISASM_H "\n"; } +} +print DISASM_H "};\n"; +print DISASM_H "\n\n"; +# ------------------------------------------------------------------------------ +print DISASM_H "// List all types of arguments available to instructions\n"; +print DISASM_H "// Referenced by InstArgsTbl[]\n"; +$nbelement=@argstypes; +print DISASM_H "\#define ArgsTextTblLength $nbelement\n"; +$elementnb=0; +print DISASM_H "static char *ArgsTextTbl[] = {\n"; +foreach $args (@argstypes) { + print DISASM_H " \"$args\""; + ($elementnb++ < $nbelement-1) and print DISASM_H ","; + print DISASM_H "\n"; +} +print DISASM_H "};\n"; +print DISASM_H "\n\n"; + +# ------------------------------------------------------------------------------ +for ($i=0 ; $i< 256; $i++) { + print INST_IMP "/*","*"x76,"\n"; + print INST_IMP " * Instruction \"$a_instruction[$i]\" takes $a_cycles[$i] cycle(s) and $a_bytes[$i] byte(s).\n"; + print INST_IMP " ","*"x76,"/\n"; + print INST_IMP "int\n"; + print INST_IMP "cpu8051_OP_$a_opcodehex[$i]( void )\n"; +# TEST hugo new... +# print INST_DEF "int OP_$a_opcodehex[$i]( );\n"; + print INST_IMP "{\n"; + + if( $i == 0x85 ) { + # Cas particulier pour MOV direct,direct -> src et dest sont inverses dans la memoire + print INST_IMP " unsigned char srcaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP " unsigned char source = cpu8051_ReadD( srcaddr );\n"; + print INST_IMP " unsigned char destaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP " unsigned char destination = cpu8051_ReadD( destaddr );\n"; + print INST_IMP " destination = source;\n"; + print INST_IMP " cpu8051_WriteD( destaddr, destination );\n"; + } + else { + if ($instargs[$i*4] > 0) { + $op_destination=$instargs[$i*4+1]; + if ($op_destination == 0) { # addr11 + print INST_IMP " unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, PC - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_destination == 1) { # addr16 + print INST_IMP "unsigned int addr16 = ( memory_read8( PGM_MEM_ID, PC++ ) << 8 );\n"; + print INST_IMP "addr16 += memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_destination == 2) { # A + print INST_IMP "unsigned char destination = cpu8051_ReadD( _ACC_ );\n"; + } + if ($op_destination == 3) { # direct + print INST_IMP "unsigned char destaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "unsigned char destination = cpu8051_ReadD( destaddr );\n"; + } + if ($op_destination == 4) { # @R0 + print INST_IMP "unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) );\n"; + } + if ($op_destination == 5) { # @R1 + print INST_IMP "unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) );\n"; + } + + if ($op_destination == 6) { # R0 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ );\n"; + } + if ($op_destination == 7) { # R1 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ );\n"; + } + if ($op_destination == 8) { # R2 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ );\n"; + } + if ($op_destination == 9) { # R3 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ );\n"; + } + if ($op_destination == 10) { # R4 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ );\n"; + } + if ($op_destination == 11) { # R5 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ );\n"; + } + if ($op_destination == 12) { # R6 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ );\n"; + } + if ($op_destination == 13) { # R7 + print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ );\n"; + } + if ($op_destination == 14) { # bitaddr + print INST_IMP "unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "destination = cpu8051_ReadB( dstbitaddr );\n"; + } + if ($op_destination == 15) { # reladdr + print INST_IMP "PC++;\n"; + print INST_IMP "unsigned int destination = ( ( memory_read8( PGM_MEM_ID, PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 );\n"; + } + if ($op_destination == 16) { # #data + print INST_IMP "unsigned char destination = memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_destination == 17) { # C + print INST_IMP "unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; + } + if ($op_destination == 18) { # @A+DPTR + print INST_IMP "unsigned int destination = cpu8051_ReadI( cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) );\n"; + } +# Mis en commentaire car donnait un warning (destination et source unused variables...) +# if ($op_destination == 20) { # AB +# print INST_IMP "unsigned char destination = cpu8051_ReadD( _ACC_ );\n"; +# print INST_IMP "unsigned char source = cpu8051_ReadD( _B_ );\n"; +# } + if ($op_destination == 21) { # DPTR + print INST_IMP "unsigned int destination = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ );\n"; + } + if ($op_destination == 22) { # #data16 + print INST_IMP "unsigned char destination = ( memory_read8( PGM_MEM_ID, PC++ ) << 8 );\n"; + print INST_IMP "destination += memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_destination == 23) { # /bitaddr + print INST_IMP "unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "destination = ( cpu8051_ReadB( dstbitaddr ) ^ 1 );\n"; + } + if ($op_destination == 24) { # @DPTR + print INST_IMP "unsigned char destination = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) );\n"; + } + } + + if ($instargs[$i*4] > 1) { + $op_source=$instargs[$i*4+2]; + if ($op_source == 0) { # addr11 + print INST_IMP "unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, PC - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_source == 1) { # addr16 + print INST_IMP "unsigned int addr16 = ( memory_read8( PGM_MEM_ID, PC++ ) << 8 );\n"; + print INST_IMP "addr16 += memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_source == 2) { # A + print INST_IMP "unsigned char source = cpu8051_ReadD( _ACC_ );\n"; + } + if ($op_source == 3) { # direct + print INST_IMP "unsigned char srcaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "unsigned char source = cpu8051_ReadD( srcaddr );\n"; + } + if ($op_source == 4) { # @R0 + print INST_IMP "unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) );\n"; + } + if ($op_source == 5) { # @R1 + print INST_IMP "unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) );\n"; + } + if ($op_source == 6) { # R0 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ );\n"; + } + if ($op_source == 7) { # R1 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ );\n"; + } + if ($op_source == 8) { # R2 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ );\n"; + } + if ($op_source == 9) { # R3 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ );\n"; + } + if ($op_source == 10) { # R4 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ );\n"; + } + if ($op_source == 11) { # R5 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ );\n"; + } + if ($op_source == 12) { # R6 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ );\n"; + } + if ($op_source == 13) { # R7 + print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ );\n"; + } + + if ($op_source == 14) { # bitaddr + print INST_IMP "unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "source = cpu8051_ReadB( srcbitaddr );\n"; + } + if ($op_source == 15) { # reladdr + print INST_IMP "PC++;\n"; + print INST_IMP "unsigned int source = ( ( memory_read8( PGM_MEM_ID, PC - 1 ) + PC ) & 0xFF ) + ( PC & 0xFF00 );\n"; + } + if ($op_source == 16) { # #data + print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_source == 17) { # C + print INST_IMP "unsigned char source = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; + } + if ($op_source == 18) { # @A+DPTR + print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) );\n"; + } + if ($op_source == 19) { # @A+PC + print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + ( ++PC ) );\n"; + } + if ($op_source == 21) { # DPTR + print INST_IMP "unsigned int source = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ );\n"; + } + if ($op_source == 22) { # #data16 + print INST_IMP "unsigned char source = ( memory_read8( PGM_MEM_ID, PC++ ) << 8 );\n"; + print INST_IMP "source += memory_read8( PGM_MEM_ID, PC++ );\n"; + } + if ($op_source == 23) { # /bitaddr + print INST_IMP "unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, PC++ );\n"; + print INST_IMP "source = ( cpu8051_ReadB( srcbitaddr ) ^ 1 );\n"; + } + if ($op_source == 24) { # @DPTR + print INST_IMP "unsigned char source = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) );\n"; + } + } + +############################################################################## + $modifysrc=0; +# print INST_IMP "\n// Inserer le code ici\n\n"; + + # RR + if ($insttype[$i] == 3) { + print INST_IMP "destination = ( destination >> 1 ) | ( destination << 7 );\n"; + } + + # INC + if ($insttype[$i] == 4) { + print INST_IMP "destination++;\n"; + } + + # JBC + if ($insttype[$i] == 5) { + print INST_IMP "if ( destination == 1 ) { PC = source; destination = 0; }\n"; + } + + # ACALL + if ($insttype[$i] == 6) { + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "cpu8051_WriteI( ++SP, ( PC & 0x00FF ) );\n"; + print INST_IMP "cpu8051_WriteI( ++SP, ( PC >> 8 ) );\n"; + print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; + } + + # LCALL + if ($insttype[$i] == 7) { + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "cpu8051_WriteI( ++SP, ( PC & 0x00FF ) );\n"; + print INST_IMP "cpu8051_WriteI( ++SP, ( PC >> 8 ) );\n"; + print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; + } + + # RRC + if ($insttype[$i] == 8) { + print INST_IMP "unsigned char tmpval = destination;\n"; + print INST_IMP "destination = ( destination >> 1 ) | ( cpu8051_ReadD( _PSW_ ) & 0x80 );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval << 7 ) );\n"; + } + + # DEC + if ($insttype[$i] == 9) { + print INST_IMP "destination--;\n"; + } + + # JB + if ($insttype[$i] == 10) { + print INST_IMP "if ( destination == 1 ) { PC = source; }\n"; + } + + # RET + if ($insttype[$i] == 11) { + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "PC = ( cpu8051_ReadI( SP-- ) << 8 );\n"; + print INST_IMP "PC += cpu8051_ReadI ( SP-- );\n"; + print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; + } + + # RL + if ($insttype[$i] == 12) { + print INST_IMP "destination = ( destination << 1 ) | ( destination >> 7 );\n"; + } + + # ADD + if ($insttype[$i] == 13) { + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; + print INST_IMP "if ( destination + source > 0xFF ) {\n"; + print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "destination += source;\n"; + } + + # JNB + if ($insttype[$i] == 14) { + print INST_IMP "if ( destination == 0 ) { PC = source; }\n"; + } + + # RETI + if ($insttype[$i] == 15) { + print INST_IMP "ActivePriority = -1;\n"; + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "PC = ( cpu8051_ReadI( SP-- ) << 8 );\n"; + print INST_IMP "PC += cpu8051_ReadI( SP-- );\n"; + } + + # RLC + if ($insttype[$i] == 16) { + print INST_IMP "unsigned char tmpval = destination;\n"; + print INST_IMP "destination = ( destination << 1 ) | ( ( cpu8051_ReadD( _PSW_ ) & 0x80 ) >> 7 );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval & 0x80 ) );\n"; + } + + # ADDC + if ($insttype[$i] == 17) { + print INST_IMP "unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; + print INST_IMP "if ( destination + source + carryflag > 0xFF ) {\n"; + print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) );\n"; + print INST_IMP "destination += source;\n"; + } + + # JC + if ($insttype[$i] == 18) { + print INST_IMP "if ( cpu8051_ReadD( _PSW_ ) > 0x7F) { PC = destination; }\n"; + } + + # ORL + if ($insttype[$i] == 19) { + if ($instargs[$i*4+1] == 17) { + # sur des bits + print INST_IMP "cpu8051_WriteD( _PSW_ , ( ( destination | source ) << 7 ) );\n"; + } else { + # sur des bytes + print INST_IMP "destination |= source;\n"; + } + } + + # JNC + if ($insttype[$i] == 20) { + print INST_IMP "if ( cpu8051_ReadD( _PSW_ ) < 0x80 ) { PC = destination; }\n"; + } + + # ANL + if ($insttype[$i] == 21) { + if ($instargs[$i*4+1] == 17) { + # sur des bits + print INST_IMP "cpu8051_WriteD( _PSW_, ( ( destination & source) << 7 ) );\n"; + } else { + # sur des bytes + print INST_IMP "destination &= source;\n"; + } + } + + # JZ + if ($insttype[$i] == 22) { + print INST_IMP "if ( cpu8051_ReadD( _ACC_ ) == 0 ) { PC = destination; }\n"; + } + + # XRL + if ($insttype[$i] == 23) { + print INST_IMP "destination ^= source;\n"; + } + + # JNZ + if ($insttype[$i] == 24) { + print INST_IMP "if ( cpu8051_ReadD( _ACC_ ) != 0 ) { PC = destination; }\n"; + } + + # JMP + if ($insttype[$i] == 25) { + print INST_IMP "PC = destination;\n"; + } + + # MOV + if ($insttype[$i] == 26) { + print INST_IMP "destination = source;\n"; + } + + # SJMP + if ($insttype[$i] == 27) { + print INST_IMP "PC = destination;\n"; + } + + # MOVC + if ($insttype[$i] == 28) { + print INST_IMP "destination = source;\n"; + } + + # DIV + if ($insttype[$i] == 29) { + print INST_IMP "unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) );\n"; + print INST_IMP "if ( B != 0 ) {\n"; + print INST_IMP "cpu8051_WriteD( _ACC_, A/B ); cpu8051_WriteD( _B_, A%B );\n"; + print INST_IMP "} else cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + } + + # SUBB + if ($insttype[$i] == 30) { + print INST_IMP "unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7;\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; + print INST_IMP "if ( destination < ( source + carryflag ) ) {\n"; + print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP " if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + print INST_IMP "if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) );\n"; + print INST_IMP "destination -= source + carryflag;\n"; + } + + # MUL + if ($insttype[$i] == 31) { + print INST_IMP "unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) );\n"; + print INST_IMP "cpu8051_WriteD( _ACC_ , ( ( A * B ) & 0x00FF ) ); cpu8051_WriteD( _B_, ( A * B ) / 0x100 );\n"; + print INST_IMP "if ( cpu8051_ReadD( _B_ ) > 0) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; + } + + # CPL + if ($insttype[$i] == 33) { + if ($instargs[$i*4+1] == 2) { print INST_IMP "destination ^= 0xFF;\n"; } + else { print INST_IMP "destination ^= 0x01;\n"; } + } + + # CJNE + if ($insttype[$i] == 34) { + print INST_IMP "unsigned int reladdr = ( ( memory_read8( PGM_MEM_ID, PC ) + ( ( PC + 1 ) & 0x00FF ) ) & 0x00FF ) + ( ( PC + 1 ) & 0xFF00 );\n"; + print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) );\n"; + print INST_IMP "if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP "if ( destination != source ) PC = reladdr;\n"; + } + + # PUSH + if ($insttype[$i] == 35) { + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "cpu8051_WriteI( ++SP, destination );\n"; + print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; + } + + # CLR + if ($insttype[$i] == 36) { + print INST_IMP "destination = 0;\n"; + } + + # SWAP + if ($insttype[$i] == 37) { + print INST_IMP "destination = ( destination << 4 ) + ( destination >> 4 );\n"; + } + + # XCH + if ($insttype[$i] == 38) { + print INST_IMP "unsigned char tmpval = destination;\n"; + print INST_IMP "destination = source; source = tmpval;\n"; + $modifysrc=1; + } + + # POP + if ($insttype[$i] == 39) { + print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; + print INST_IMP "destination = cpu8051_ReadI( SP-- );\n"; + print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; + } + + # SETB + if ($insttype[$i] == 40) { + print INST_IMP "destination = 1;\n"; + } + + # DA + if ($insttype[$i] == 41) { + print INST_IMP "if ( ( ( destination & 0x0F ) > 9) || ( cpu8051_ReadD( _PSW_ ) | 0x40)) {\n"; + print INST_IMP " if ( ( destination + 6 ) > 0xFF) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP " destination += 6;\n"; + print INST_IMP "}\n"; + print INST_IMP "if ( ( cpu8051_ReadD( _PSW_ ) & 0x80) || ( ( destination & 0xF0 ) > 0x90 ) ) {\n"; + print INST_IMP " if ( ( destination + 0x60 ) > 0xFF ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; + print INST_IMP " destination += 0x60;\n"; + print INST_IMP "}\n"; + } + + # DJNZ + if ($insttype[$i] == 42) { + print INST_IMP "destination--;\n"; + print INST_IMP "if ( destination != 0 ) PC = source;\n"; + } + + # XCHD + if ($insttype[$i] == 43) { + print INST_IMP "unsigned char tmpval = ( destination & 0x0F );\n"; + print INST_IMP "destination = ( destination & 0xF0 ) + ( source & 0x0F );\n"; + print INST_IMP "source = ( source & 0xF0 ) + tmpval;\n"; + $modifysrc=1; + } + + # MOVX + if ($insttype[$i] == 44) { + print INST_IMP "destination = source;\n"; + } + + + +############################################################################## + + + if ($instargs[$i*4] > 0) { + $op_destination=$instargs[$i*4+1]; + if ($op_destination == 0) { # addr11 + print INST_IMP "PC = ( PC & 0xF800 ) | addr11;\n"; + } + if ($op_destination == 1) { # addr16 + print INST_IMP "PC = addr16;\n"; + } + if ($op_destination == 2) { # A + print INST_IMP "cpu8051_WriteD( _ACC_, destination );\n"; + } + if ($op_destination == 3) { # direct + print INST_IMP "cpu8051_WriteD( destaddr, destination );\n"; + } + if ($op_destination == 4) { # @R0 + print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination );\n"; + } + if ($op_destination == 5) { # @R1 + print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination );\n"; + } + if ($op_destination == 6) { # R0 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R0_, destination );\n"; + } + if ($op_destination == 7) { # R1 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R1_, destination );\n"; + } + if ($op_destination == 8) { # R2 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R2_, destination );\n"; + } + if ($op_destination == 9) { # R3 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R3_, destination );\n"; + } + if ($op_destination == 10) { # R4 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R4_, destination );\n"; + } + if ($op_destination == 11) { # R5 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R5_, destination );\n"; + } + if ($op_destination == 12) { # R6 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R6_, destination );\n"; + } + if ($op_destination == 13) { # R7 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R7_, destination );\n"; + } + + if ($op_destination == 14) { # bitaddr + print INST_IMP "cpu8051_WriteB( dstbitaddr, destination );\n"; + } + if ($op_destination == 17) { # C + print INST_IMP "cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) );\n"; + } + if ($op_destination == 21) { # DPTR + print INST_IMP "cpu8051_WriteD( _DPTRHIGH_, ( destination >> 8 ) );\n"; + print INST_IMP "cpu8051_WriteD( _DPTRLOW_, ( destination & 0xFF ) );\n"; + } + if ($op_destination == 23) { # /bitaddr + print INST_IMP "cpu8051_WriteB( dstbitaddr, destination );\n"; + } + if ($op_destination == 24) { # @DPTR + print INST_IMP "cpu8051_WriteI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ), destination );\n"; + } + } + + if ($modifysrc == 1) { + if ($instargs[$i*4] > 1) { + $op_source=$instargs[$i*4+2]; + if ($op_source == 0) { # addr11 + print INST_IMP "PC = ( PC & 0xF800 ) | addr11;\n"; + } + if ($op_source == 1) { # addr16 + print INST_IMP "PC = addr16;\n"; + } + if ($op_source == 2) { # A + print INST_IMP "cpu8051_WriteD( _ACC_, source );\n"; + } + if ($op_source == 3) { # direct + print INST_IMP "cpu8051_WriteD( srcaddr, source );\n"; + } + if ($op_source == 4) { # @R0 + print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), source );\n"; + } + if ($op_source == 5) { # @R1 + print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), source );\n"; + } + if ($op_source == 6) { # R0 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R0_, source );\n"; + } + if ($op_source == 7) { # R1 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R1_, source );\n"; + } + if ($op_source == 8) { # R2 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R2_, source );\n"; + } + if ($op_source == 9) { # R3 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R3_, source );\n"; + } + if ($op_source == 10) { # R4 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R4_, source );\n"; + } + if ($op_source == 11) { # R5 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R5_, source );\n"; + } + if ($op_source == 12) { # R6 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R6_, source );\n"; + } + if ($op_source == 13) { # R7 + print INST_IMP "cpu8051_WriteD( BANKPSW + _R7_, source );\n"; + } + if ($op_source == 14) { # bitaddr + print INST_IMP "cpu8051_WriteB( srcbitaddr, source );\n"; + } + if ($op_source == 17) { # C + print INST_IMP "cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( source << 7 ) ) );\n"; + } + if ($op_source == 21) { # DPTR + print INST_IMP "cpu8051_WriteD( _DPTRHIGH_, ( source >> 8 ) );\n"; + print INST_IMP "cpu8051_WriteD( _DPTRLOW_, ( source & 0xFF ) );\n"; + } + if ($op_source == 23) { # /bitaddr + print INST_IMP "cpu8051_WriteB( srcbitaddr, source );\n"; + } + if ($op_source == 24) { # @DPTR + print INST_IMP "cpu8051_WriteI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ), source );\n"; + } + } + } + } + print INST_IMP "return $a_cycles[$i];\n"; + print INST_IMP "}\n"; + print INST_IMP "\n\n"; +} +# ------------------------------------------------------------------------------ + + + +print INST_DEF "/* instructions_8051.h */\n\n\n"; +print INST_DEF "/* Do not modify this file directly, as it was created by opcode2c.pl\n"; +print INST_DEF " * Any modifications made directly to this file will be lost. */\n\n\n"; +print INST_DEF "#ifndef INSTRUCTIONS_8051_H\n"; +print INST_DEF "#define INSTRUCTIONS_8051_H 1\n\n\n"; +print INST_DEF "#define BANKPSW ( cpu8051_ReadD( _PSW_ ) & 0x18 )\n\n"; +print INST_DEF "typedef int (*OPCODE_FP)( void );\n\n\n"; +for( $i=0; $i<256; $i++ ) { + print INST_DEF "int\n"; + print INST_DEF "cpu8051_OP_$a_opcodehex[$i]( void );\n\n"; +} +print INST_DEF "\n"; +print INST_DEF "/* Exported variables. */\n"; +print INST_DEF "#ifdef INSTRUCTIONS_8051_M\n"; +print INST_DEF "OPCODE_FP opcode_table[256] = {\n"; +for( $i=0; $i<256; $i++ ) { + $ifunc=substr($instfunction[$i], 9); + if( $i < 255 ) { + print INST_DEF " cpu8051_$ifunc,\n"; + } + else { + print INST_DEF " cpu8051_$ifunc\n"; + print INST_DEF "};\n"; + } +} + +print INST_DEF "#else\n"; +print INST_DEF "OPCODE_FP opcode_table[256];\n"; +print INST_DEF "#endif\n\n\n"; + +print INST_DEF "#endif /* INSTRUCTIONS_8051_H */\n"; + + + + + + +print DISASM_H "\n\n#endif /* DISASM_H */\n"; + +close DISASM_H; +close OPCODELST; +close INST_DEF; +close INST_IMP; + + diff --git a/src/PgmWin.cpp b/src/pgmwin.c similarity index 65% rename from src/PgmWin.cpp rename to src/pgmwin.c index b362709..80c1f08 100644 --- a/src/PgmWin.cpp +++ b/src/pgmwin.c @@ -1,24 +1,43 @@ -/* pgmwin.cpp */ +/* pgmwin.c */ #if HAVE_CONFIG_H # include "config.h" #endif -#include "PgmWin.hpp" #include +#include "cpu8051.h" +#include "pgmwin.h" + + +/* private */ +GtkWidget *pgmwin; +GtkWidget *pgmclist; +int NbBreakpoints; +unsigned int Breakpoints[ MAXBP ]; +unsigned int DisasmAddresses[ 24 ]; + + +/* int PgmWinNumber = 0; int PgmWinNumbers[ 1 ]; -PgmWin *PgmWinPtrs[ 1 ]; +*/ + + +/*PgmWin *PgmWinPtrs[ 1 ];*/ + + +/* in cpu8051.c */ +extern unsigned int PC; + ////////////////////////////////////////////////////////////////////////////// -// PgmWin::PgmWin( GtkWidget *parentwin, CPU8051 *mCPU ) // PgmWin constructor ////////////////////////////////////////////////////////////////////////////// -PgmWin::PgmWin( GtkWidget *parentwin, CPU8051 *mCPU ) +void +pgmwin_init( GtkWidget *parentwin ) { - CPU = mCPU; int i; GtkStyle *style; GdkFont *fixedfont; @@ -49,41 +68,33 @@ PgmWin::PgmWin( GtkWidget *parentwin, CPU8051 *mCPU ) NbBreakpoints = 0; - if ( PgmWinNumber >= 1 ) g_print( "WARNING! Too many PgmWin objects to handle signals!\n"); - else { - PgmWinPtrs[ PgmWinNumber ] = this; - PgmWinNumbers[ PgmWinNumber ] = PgmWinNumber; - gtk_signal_connect( GTK_OBJECT( pgmclist ), "button-press-event", GTK_SIGNAL_FUNC( PgmWinButtonPress ), &PgmWinNumbers[ PgmWinNumber++ ] ); - } -} - - -////////////////////////////////////////////////////////////////////////////// -// PgmWin::~PgmWin( ) -// PgmWin destructor -////////////////////////////////////////////////////////////////////////////// -PgmWin::~PgmWin( ) -{ + /* + PgmWinPtrs[ PgmWinNumber ] = this; + PgmWinNumbers[ PgmWinNumber ] = PgmWinNumber; + gtk_signal_connect( GTK_OBJECT( pgmclist ), "button-press-event", GTK_SIGNAL_FUNC( PgmWinButtonPress ), &PgmWinNumbers[ PgmWinNumber++ ] ); + */ } + ////////////////////////////////////////////////////////////////////////////// -// void PgmWin::Disasm( ) +// void pgmwin_Disasm( ) // Disasm 24 lines from CPU ////////////////////////////////////////////////////////////////////////////// -void PgmWin::Disasm( ) +void +pgmwin_Disasm( ) { char TextTmp[255]; int row; //int TextLength; int InstSize; unsigned int Address; -Address = CPU->GetPC( ); +Address = PC; gtk_clist_freeze( GTK_CLIST( pgmclist ) ); for ( row = 0; row < 24; row++ ) { - InstSize = CPU->Disasm( Address, TextTmp ); - if ( IsBreakpoint( Address ) ) TextTmp[0] = '*'; + InstSize = cpu8051_Disasm( Address, TextTmp ); + if ( pgmwin_IsBreakpoint( Address ) ) TextTmp[0] = '*'; gtk_clist_set_text( GTK_CLIST( pgmclist ), row, 0, TextTmp ); DisasmAddresses[ row ] = Address; Address += InstSize; @@ -93,23 +104,23 @@ gtk_clist_thaw( GTK_CLIST( pgmclist ) ); } ////////////////////////////////////////////////////////////////////////////// -// gint PgmWin::ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +// gint pgmwin_ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) // Mouse button pressed in the window ////////////////////////////////////////////////////////////////////////////// -gint PgmWin::ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) +gint pgmwin_ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ) { gint row, column; char TextTmp[ 255 ]; - //g_print( "PgmWin::ButtonPressEvent(...)\n" ); + //g_print( "pgmwin_ButtonPressEvent(...)\n" ); gtk_clist_get_selection_info( GTK_CLIST( pgmclist ), ( int )event->button.x ,( int )event->button.y, &row, &column ); if (row >= 24 || row < 0) return TRUE; if (column >= 1 || column < 0) return TRUE; - sprintf( TextTmp, "PgmWin::ButtonPressEvent( ) at %d,%d\n", column, row ); + sprintf( TextTmp, "pgmwin_ButtonPressEvent( ) at %d,%d\n", column, row ); g_print( TextTmp ); - ToggleBreakpoint( DisasmAddresses[ row ] ); - Disasm( ); + pgmwin_ToggleBreakpoint( DisasmAddresses[ row ] ); + pgmwin_Disasm( ); return FALSE; } @@ -117,28 +128,32 @@ gint PgmWin::ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data // gint PgmWinButtonPress( GtkWidget *widget, GdkEvent *event, gpointer data ) // Signal Stub with 3 parameters ////////////////////////////////////////////////////////////////////////////// -void PgmWinButtonPress( GtkWidget *widget, GdkEvent *event, gpointer data ) +void +PgmWinButtonPress( GtkWidget *widget, GdkEvent *event, gpointer data ) { -int PWNumber = (* ( static_cast< int * >( data ) ) ); -PgmWinPtrs[ PWNumber ]->ButtonPressEvent( widget, event, 0 ); + /*int PWNumber = *( (int *) data );*/ + + pgmwin_ButtonPressEvent( widget, event, 0 ); } ////////////////////////////////////////////////////////////////////////////// -// void PgmWin::ShowBreakpoints( ) +// void pgmwin_ShowBreakpoints( ) // Show Breakpoints list ////////////////////////////////////////////////////////////////////////////// -void PgmWin::ShowBreakpoints( ) +void pgmwin_ShowBreakpoints( ) { - for ( int Index = 0; Index < NbBreakpoints ; Index++ ) + int Index; + + for ( Index = 0; Index < NbBreakpoints ; Index++ ) printf( "Breakpoint at Address = %.4X\n", Breakpoints[ Index ] ); } ////////////////////////////////////////////////////////////////////////////// -// void PgmWin::ClearBreakpoint( unsigned int Address ) +// void pgmwin_ClearBreakpoint( unsigned int Address ) // Clear Breakpoint at Address from list ////////////////////////////////////////////////////////////////////////////// -void PgmWin::ClearBreakpoint( unsigned int Address ) +void pgmwin_ClearBreakpoint( unsigned int Address ) { int Index = 0; while ( Index < NbBreakpoints && Breakpoints[ Index ] != Address ) Index++; @@ -148,20 +163,20 @@ void PgmWin::ClearBreakpoint( unsigned int Address ) } ////////////////////////////////////////////////////////////////////////////// -// void PgmWin::SetBreakpoint( unsigned int Address ) +// void pgmwin_SetBreakpoint( unsigned int Address ) // Set Breakpoint at Address from list ////////////////////////////////////////////////////////////////////////////// -void PgmWin::SetBreakpoint( unsigned int Address ) +void pgmwin_SetBreakpoint( unsigned int Address ) { - if ( IsBreakpoint( Address ) ) return; + if ( pgmwin_IsBreakpoint( Address ) ) return; if ( NbBreakpoints < MAXBP ) Breakpoints[ NbBreakpoints++ ] = Address; } ////////////////////////////////////////////////////////////////////////////// -// int PgmWin::IsBreakpoint( unsigned int Address ) +// int pgmwin_IsBreakpoint( unsigned int Address ) // Is the a breakpoint at Address ////////////////////////////////////////////////////////////////////////////// -int PgmWin::IsBreakpoint( unsigned int Address ) +int pgmwin_IsBreakpoint( unsigned int Address ) { int Index = 0; while ( Index < NbBreakpoints && Breakpoints[ Index ] != Address ) Index++; @@ -169,13 +184,13 @@ int PgmWin::IsBreakpoint( unsigned int Address ) } ////////////////////////////////////////////////////////////////////////////// -// void PgmWin::ToggleBreakpoint( unsigned int Address ) +// void pgmwin_ToggleBreakpoint( unsigned int Address ) // Toggle the breakpoint at Address ////////////////////////////////////////////////////////////////////////////// -void PgmWin::ToggleBreakpoint( unsigned int Address ) +void pgmwin_ToggleBreakpoint( unsigned int Address ) { - if ( IsBreakpoint( Address ) ) ClearBreakpoint( Address ); - else SetBreakpoint( Address ); + if ( pgmwin_IsBreakpoint( Address ) ) pgmwin_ClearBreakpoint( Address ); + else pgmwin_SetBreakpoint( Address ); } diff --git a/src/pgmwin.h b/src/pgmwin.h new file mode 100644 index 0000000..dc3cbae --- /dev/null +++ b/src/pgmwin.h @@ -0,0 +1,43 @@ +/* pgmwin.h */ + + +#ifndef PGMWIN_H +#define PGMWIN_H 1 + + +#include +#include "gtksizes.h" + + +#define MAXBP 32 + + +void +pgmwin_init( GtkWidget *parentwin ); + +void +pgmwin_Disasm( void ); + +gint +pgmwin_ButtonPressEvent( GtkWidget *widget, GdkEvent *event, gpointer data ); + +void +pgmwin_ShowBreakpoints( void ); + +void +pgmwin_SetBreakpoint( unsigned int Address ); + +void +pgmwin_ClearBreakpoint( unsigned int Address ); + +int +pgmwin_IsBreakpoint( unsigned int Address ); + +void +pgmwin_ToggleBreakpoint( unsigned int Address ); + +void +pgmwin_PgmWinButtonPress( GtkWidget *widget, GdkEvent *event, gpointer data ); + + +#endif /* PGMWIN_H */ diff --git a/src/reg8051.h b/src/reg8051.h new file mode 100644 index 0000000..693b788 --- /dev/null +++ b/src/reg8051.h @@ -0,0 +1,49 @@ +/* reg8051.h */ + + +#ifndef REG8051_H +#define REG8051_H 1 + + +/* SFR Registers ( $80 - $FF ) */ +#define _ACC_ 0xE0 +#define _B_ 0xF0 +#define _PSW_ 0xD0 +#define _SP_ 0x81 +#define _DPTRLOW_ _DPL_ +#define _DPTRHIGH_ _DPH_ +#define _DPL_ 0x82 +#define _DPH_ 0x83 +#define _P0_ 0x80 +#define _P1_ 0x90 +#define _P2_ 0xA0 +#define _P3_ 0xB0 +#define _IP_ 0xB8 +#define _IE_ 0xA8 +#define _TMOD_ 0x89 +#define _TCON_ 0x88 +#define _TH0_ 0x8C +#define _TL0_ 0x8A +#define _TH1_ 0x8D +#define _TL1_ 0x8B +#define _SCON_ 0x98 +#define _SBUF_ 0x99 +#define _PCON_ 0x87 +#define _T2CON_ 0xC8 + +#define _R0_ 0x00 +#define _R1_ 0x01 +#define _R2_ 0x02 +#define _R3_ 0x03 +#define _R4_ 0x04 +#define _R5_ 0x05 +#define _R6_ 0x06 +#define _R7_ 0x07 + +#define _BANK0_ 0x00 +#define _BANK1_ 0x08 +#define _BANK2_ 0x10 +#define _BANK3_ 0x18 + + +#endif /* REG8051_H */ diff --git a/src/RegWin.cpp b/src/regwin.c similarity index 64% rename from src/RegWin.cpp rename to src/regwin.c index 0047ec5..91f156a 100644 --- a/src/RegWin.cpp +++ b/src/regwin.c @@ -6,14 +6,26 @@ #endif #include -#include "RegWin.hpp" + +#include "reg8051.h" +#include "cpu8051.h" +#include "regwin.h" + + +/* private */ +/*GtkWidget *regwin;*/ +GtkWidget *regclist; + + +/* in cpu8051.c */ +extern unsigned int PC; ////////////////////////////////////////////////////////////////////////////// -// RegWin::RegWin( GtkWidget *parentwin ) // RegWin constructor ////////////////////////////////////////////////////////////////////////////// -RegWin::RegWin( GtkWidget *parentwin ) +void +regwin_init( GtkWidget *parentwin ) { int i; GtkStyle *style; @@ -47,36 +59,29 @@ RegWin::RegWin( GtkWidget *parentwin ) ////////////////////////////////////////////////////////////////////////////// -// RegWin::~RegWin( ) -// RegWin destructor -////////////////////////////////////////////////////////////////////////////// -RegWin::~RegWin( ) -{ -} - -////////////////////////////////////////////////////////////////////////////// -// void RegWin::Show( CPU8051 *CPU ) +// void regwin_Show( CPU8051 *CPU ) // Show registers ////////////////////////////////////////////////////////////////////////////// -void RegWin::Show( CPU8051 *CPU ) +void +regwin_Show( void ) { char TextTmp[255]; int row = 0; - unsigned char PSW = CPU->ReadD( _PSW_ ); + unsigned char PSW = cpu8051_ReadD( _PSW_ ); unsigned char Rbank; gtk_clist_freeze( GTK_CLIST( regclist ) ); // Main registers - sprintf( TextTmp , "PC = %.4X", CPU->GetPC( ) ); + sprintf( TextTmp , "PC = %.4X", PC ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "SP = %.2X", CPU->ReadD( _SP_ ) ); + sprintf( TextTmp , "SP = %.2X", cpu8051_ReadD( _SP_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "A = %.2X", CPU->ReadD( _ACC_ ) ); + sprintf( TextTmp , "A = %.2X", cpu8051_ReadD( _ACC_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "B = %.2X", CPU->ReadD( _B_ ) ); + sprintf( TextTmp , "B = %.2X", cpu8051_ReadD( _B_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "DPTR = %.4X", ( CPU->ReadD( _DPTRHIGH_ ) << 8 ) + CPU->ReadD( _DPTRLOW_ ) ); + sprintf( TextTmp , "DPTR = %.4X", ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); // Program Status Word @@ -84,46 +89,46 @@ void RegWin::Show( CPU8051 *CPU ) gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); // Ports registers - sprintf( TextTmp , "P0 = %.2X", CPU->ReadD( _P0_ ) ); + sprintf( TextTmp , "P0 = %.2X", cpu8051_ReadD( _P0_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "P1 = %.2X", CPU->ReadD( _P1_ ) ); + sprintf( TextTmp , "P1 = %.2X", cpu8051_ReadD( _P1_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "P2 = %.2X", CPU->ReadD( _P2_ ) ); + sprintf( TextTmp , "P2 = %.2X", cpu8051_ReadD( _P2_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "P3 = %.2X", CPU->ReadD( _P3_ ) ); + sprintf( TextTmp , "P3 = %.2X", cpu8051_ReadD( _P3_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); // Misc Registers - sprintf( TextTmp , "TCON = %.2X", CPU->ReadD( _TCON_ ) ); + sprintf( TextTmp , "TCON = %.2X", cpu8051_ReadD( _TCON_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "TMOD = %.2X", CPU->ReadD( _TMOD_ ) ); + sprintf( TextTmp , "TMOD = %.2X", cpu8051_ReadD( _TMOD_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "SCON = %.2X", CPU->ReadD( _SCON_ ) ); + sprintf( TextTmp , "SCON = %.2X", cpu8051_ReadD( _SCON_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "IE = %.2X", CPU->ReadD( _IE_ ) ); + sprintf( TextTmp , "IE = %.2X", cpu8051_ReadD( _IE_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "IP = %.2X", CPU->ReadD( _IP_ ) ); + sprintf( TextTmp , "IP = %.2X", cpu8051_ReadD( _IP_ ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); // R0-R7 Registers in current Bank - Rbank = CPU->ReadD( _PSW_ ) & 0x18; + Rbank = cpu8051_ReadD( _PSW_ ) & 0x18; sprintf( TextTmp , "Bank = %.2X", Rbank); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R0 = %.2X", CPU->ReadD( _R0_ + Rbank ) ); + sprintf( TextTmp , "R0 = %.2X", cpu8051_ReadD( _R0_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R1 = %.2X", CPU->ReadD( _R1_ + Rbank ) ); + sprintf( TextTmp , "R1 = %.2X", cpu8051_ReadD( _R1_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R2 = %.2X", CPU->ReadD( _R2_ + Rbank ) ); + sprintf( TextTmp , "R2 = %.2X", cpu8051_ReadD( _R2_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R3 = %.2X", CPU->ReadD( _R3_ + Rbank ) ); + sprintf( TextTmp , "R3 = %.2X", cpu8051_ReadD( _R3_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R4 = %.2X", CPU->ReadD( _R4_ + Rbank ) ); + sprintf( TextTmp , "R4 = %.2X", cpu8051_ReadD( _R4_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R5 = %.2X", CPU->ReadD( _R5_ + Rbank ) ); + sprintf( TextTmp , "R5 = %.2X", cpu8051_ReadD( _R5_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R6 = %.2X", CPU->ReadD( _R6_ + Rbank ) ); + sprintf( TextTmp , "R6 = %.2X", cpu8051_ReadD( _R6_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); - sprintf( TextTmp , "R7 = %.2X", CPU->ReadD( _R7_ + Rbank ) ); + sprintf( TextTmp , "R7 = %.2X", cpu8051_ReadD( _R7_ + Rbank ) ); gtk_clist_set_text( GTK_CLIST( regclist ), row++, 0, TextTmp ); gtk_clist_select_row(GTK_CLIST(regclist),0,0); diff --git a/src/regwin.h b/src/regwin.h new file mode 100644 index 0000000..2b571b5 --- /dev/null +++ b/src/regwin.h @@ -0,0 +1,19 @@ +/* regwin.h */ + + +#ifndef REGWIN_H +#define REGWIN_H 1 + + +#include +#include "gtksizes.h" + + +void +regwin_init( GtkWidget *parentwin ); + +void +regwin_Show( void ); + + +#endif /* REGWIN_H */ -- 2.20.1